MC10105 ON Semiconductor, MC10105 Datasheet
MC10105
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MC10105 Summary of contents
Page 1
... The MC10105 is a triple 2–3–2 input OR/NOR gate typ/gate (No Load 2.0 ns typ 2.0 ns typ (20%–80 LOGIC DIAGRAM DIP PIN ASSIGNMENT Pin assignment is for Dual–in–Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 18 of the ON Semiconductor MECL Data Book (DL122/D) ...
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... Switching Times (50 Load) Propagation Delay t 4+3– t 4–3+ t 4+2+ t 4–2– Rise Time ( Fall Time (20 to 80%) t 3– t 2– MC10105 Test Limits Pin –30 C Under Under Test Min Max Min 425 4 0.5 0.5 3 –1.060 –0.890 –0.960 2 – ...
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... The circuit test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are terminated through a 50-ohm resistor to –2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the same manner. MC10105 TEST VOLTAGE VALUES (Volts) V ...
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... Y BRK –L– –M– –T– J VIEW S G1 MC10105 PACKAGE DIMENSIONS PLCC–20 FN SUFFIX PLASTIC PLCC PACKAGE CASE 775–02 ISSUE VIEW D– VIEW S http://onsemi.com ...
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... –A– –T– MC10105 PACKAGE DIMENSIONS CDIP–16 L SUFFIX CERAMIC DIP PACKAGE CASE 620–10 ISSUE PDIP–16 P SUFFIX PLASTIC DIP PACKAGE CASE 648–08 ISSUE R ...
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... Notes MC10105 http://onsemi.com 6 ...
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... Notes MC10105 http://onsemi.com 7 ...
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... N. American Technical Support: 800–282–9855 Toll Free USA/Canada MC10105 JAPAN: ON Semiconductor, Japan Customer Focus Center 4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031 Phone: 81–3–5740–2700 Email: r14525@onsemi.com ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative. http://onsemi.com 8 MC10105/D ...