SST49LF040 Silicon Storage Technology, SST49LF040 Datasheet - Page 28

• Manufacturer Part Number: SST49LF040
• Description: 4 Mbit LPC Flash
• Manufacturer: Silicon Storage Technology

©2001 Silicon Storage Technology, Inc.
FIGURE 16: B
LFRAME#
LAD[3:0]
RST#
LCLK
CE#
RST# = V IH
RST# = V IH
RST# = V IH
RST# = V IH
RST# = V IH
LFRAME#
LFRAME#
LFRAME#
LFRAME#
LFRAME#
CE# = V IL
CE# = V IL
CE# = V IL
CE# = V IL
CE# = V IL
LAD[3:0]
LAD[3:0]
LAD[3:0]
LAD[3:0]
LAD[3:0]
LCLK
LCLK
LCLK
LCLK
LCLK
LOCK
Note: YYYY must be within memory address range specified in Figures 4 and 5.
Write the 6th command (target sector to be erased) to the device in LPC mode.
BA X = Block Address
-E
RASE
1st Start
2nd Start
3rd Start
4th Start
6th Start
1 Clock 1 Clock
1 Clock 1 Clock
1 Clock 1 Clock
1 Clock 1 Clock
1 Clock 1 Clock
1 Clock 1 Clock
5th
0000b
0000b
0000b
0000b 011Xb
0000b
0000b
T
IMING
Memory
Memory
Memory
Memory
Memory
Memory
Cycle
Cycle
011Xb
Cycle
011Xb
Cycle
011Xb
Cycle
011Xb
Write
Write
Write
Write
Write
Write
Cycle
011Xb
A[31:28] A[27:24]
A[31:28] A[27:24]
A[31:28] A[27:24]
A[31:28] A[27:24]
A[31:28] A[27:24]
A[31:28] A[27:24]
D
IAGRAM
Load Address "YYYY 5555H" in 8 Clocks
Load Address "YYYY 2AAAH" in 8 Clocks
Load Address "YYYY 2AAAH" in 8 Clocks
Load Address "YYYY 5555H" in 8 Clocks
Load Address "YYYY 5555H" in 8 Clocks
Load Block Address in 8 Clocks
A[23:20] A[19:16]
A[23:20] A[19:16]
A[23:20] A[19:16]
A[23:20] A[19:16]
A[23:20] A[19:16]
A[23:20]
(LPC M
Write the 1st command to the device in LPC mode.
Write the 2nd command to the device in LPC mode.
Write the 3rd command to the device in LPC mode.
Write the 4th command to the device in LPC mode.
Write the 5th command to the device in LPC mode.
Address 1
Address 1
Address 1
Address 1
Address 1
Address 1
A[19:16]
0101b
0101b
0010b
0101b
0010b
BA X
ODE
28
0101b
0101b
0101b
1010b
XXXXb XXXXb XXXXb
1010b
)
0101b
0101b
1010b
1010b
0101b
1010b
1010b
0101b
0101b
0101b
Load Data "AAH" in 2 Clocks
Load Data "80H" in 2 Clocks
Load Data "AAH" in 2 Clocks
Load Data "55H" in 2 Clocks
Load Data "55H" in 2 Clocks
Load Data “50” in 2 Clocks
1010b
1010b
0101b
0101b
0000b
0000b
Data
Data
Data
Data
Data
Data
1010b
1000b
1010b
0101b
0101b
0101b
1111b
1111b
1111b
1111b
1111b
1111b
2 Clocks
2 Clocks
2 Clocks
2 Clocks
2 Clocks
2 Clocks
TAR
TAR
TAR
TAR
TAR
TAR
Tri-State
Tri-State
Tri-State
Tri-State
Tri-State
Tri-State
1 Clock
1 Clock
1 Clock
1 Clock
1 Clock
1 Clock
0000b
Sync
0000b
0000b
0000b
0000b
0000b
Sync
Sync
Sync
Sync
Sync
4 Mbit LPC Flash
TAR
Advance Information
TAR
TAR
TAR
TAR
TAR
SST49LF040
S71213-00-000 11/01 562
562 ILL F15.1
Command
erase start
Command
Start next
Command
erase start
Start next
Command
Command
Start next
Start next
Start next
1 Clock
1 Clock
1 Clock
1 Clock
Internal
Internal
1 Clock