MT8950 Mitel Networks Corporation, MT8950 Datasheet - Page 7
MT8950
Manufacturer Part Number
MT8950
Description
ISO-CMOS ST-BUS FAMILY Data Codec
Manufacturer
Mitel Networks Corporation
Datasheet
1.MT8950.pdf
(16 pages)
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word on the first rising edge of the clock after F1i
and CA are taken low.
the input ST-BUS stream is clocked into the device
on the negative edge of the C2i clock. For proper
codec operation, the ST-BUS interface (DSTo, DSTi,
Bipolar RZ
Equivalent
RxE
D
MARK Pulses
(Polarity
Established)
D
SPACE Pulses.
Signal Regenerated at Remote End
D
MARK Pulses
D
SPACE Pulses
NRZ
Equivalent
V = Violations Pulse; D = Data Pulse
D
NRZ Input
D
Secondary
Input
Signal Regenerated at Remote End
D
Data
Output
D
Secondary
Output
X
R
X
R
X
X
1 Input
R
R
2 Input
2 Output
1 Output
1
2
1
2
Each transition on this output denotes a pulse input at D
SPACE
SPACE
Figure 5 - Example Input/Output Waveform in the NRZ format (DF=LOW)
Figure 4 - Example Input/Output Waveform in the RZ format (DF=HIGH)
D
D
D
MARK
The 8 bit TEM word from
MARK
MARK
Establishes MARK polarity. See text for complete explanation.
D
D
D
SPACE
125 s.
Min.
52 s. Nom. or
104 s. Nom. or
SPACE
> 125 s
52 s. Nom. or
104 s. Nom. or
> 125 s
SPACE
35 s. Nom.
52 s. Nom. or
104 s. Nom. or
> 125 s
D
D
D
MARK
125 s. Min.
4 s. Min.
T
35 s. Nom.
b
X
2 on the remote end
D
D
Max.
D
MARK
and CSTi) should be enabled for only 8 clock periods
of the C2i clock in any 125µs period (one ST-BUS
frame time) as shown in Figure 11. All data input
and output at the ST-BUS interface takes place at
2.048 Mbps.
MARK
SPACE
V
V
V
ISO-CMOS
125 s. Min.
4 s. Min.
121 s. Max.
T
b
= Bit Period
V
V
V
MT8950
125 s.
125 s.
Min.
Min.
6-9