MT5C1005 ASI, MT5C1005 Datasheet - Page 5

no-image

MT5C1005

Manufacturer Part Number
MT5C1005
Description
SRAM MEMORY ARRAY
Manufacturer
ASI
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT5C1005
Manufacturer:
MT
Quantity:
6 233
Part Number:
MT5C1005C-20/883
Manufacturer:
ASI
Quantity:
17
Part Number:
MT5C1005C-25
Manufacturer:
a
Quantity:
28
Part Number:
MT5C1005C-25
Manufacturer:
MOT
Quantity:
40
Part Number:
MT5C1005C-25/883C
Manufacturer:
TI
Quantity:
60
Part Number:
MT5C1005DJ-25
Manufacturer:
MICRON/镁光
Quantity:
20 000
NOTES
1.
2.
3.
4.
5.
6. Minimum of 5pF for t
DATA RETENTION ELECTRICAL CHARACTERISTICS (L Version Only)
V
Data Retention Current
Chip Deselect to Data
Retention Time
Operation Recovery Time
CC
AC TEST CONDITIONS
Input pulse levels ................................... Vss to 3.0V
Input rise and fall times ....................................... 5ns
Input timing reference levels ............................. 1.5V
Output reference levels ..................................... 1.5V
Output load .............................. See Figures 1 and 2
and t
All voltages referenced to V
-3V for pulse width < 20ns
I
The specified value applies with the outputs
unloaded, and f =
This parameter is guaranteed but not tested.
Test conditions as specified with the output loading
as shown in Fig. 1 unless otherwise noted.
CC
for Retention Data
DESCRIPTION
is dependent on output loading and cycle rates.
WHQX
.
CE\
V
t
RC (MIN)
CC
1
EHQZ
V
V
IL
IH
CE\ > (V
V
1 2 3 4 5 6 7 8 9
1 2 3
1 2 3 4
1 2 3 4 5 6 7 8 9
1 2 3
1 2 3 4
1 2 3 4 5 6 7 8 9
1 2 3
1 2 3 4
1 2 3 4 5 6 7 8 9
1 2 3
1 2 3 4
SS
, t
IN
Hz.
(GND).
LOW Vcc DATA RETENTION WAVEFORM
OHQZ
> (V
or < 0.2V
and
CONDITIONS
CC
, t
CC
-0.2V)
-0.2V)
ELQX
t
CDR
, t
OLQX
4.5V
V
CC
,
DATA RETENTION MODE
= 2V
V
V
DR
DR
Q
7. At any given temperature and voltage condition,
8.
9.
10. Address valid prior to, or coincident with, latest
11.
12. Chip enable (CE\) and write enable (WE\) can initiate and
> 2V
I
SYM
CCDR
t
V
CDR
t
DR
t
t
WE\ is HIGH for READ cycle.
Device is continuously selected. Chip enables and
output enables are held in their active state.
occurring chip enable.
t
terminate a WRITE cycle.
R
HZCE is less than
LZWE and
RC = Read Cycle Time.
Fig. 1 Output Load
Equivalent
30pF
167
MIN
t
4.5V
RC
2
0
t
HZOE is less than
V
TH
t
R
= 1.73V
MAX
t
LZCE, and
--
5
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
UNITS NOTES
Q
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
mA
ns
ns
V
1 2 3
1 2 3
1 2 3
1 2 3
t
LZOE.
t
HZWE is less than
MT5C1005
Fig. 2 Output Load
1 2 3
1 2 3
1 2 3
1 2 3
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
4, 11
5pF
167
4
Equivalent
UNDEFINED
DON’T CARE
V
TH
= 1.73V

Related parts for MT5C1005