S-8327 Seiko, S-8327 Datasheet - Page 51

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S-8327

Manufacturer Part Number
S-8327
Description
(S-8323 / S-8327) SMALL PACKAGE PWM CONTROL STEP-UP SWITCHING REGULATOR
Manufacturer
Seiko
Datasheet

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<Remarks>
CONT Voltage (V)
In the output-voltage boosting circuit shown in Figure 1, when the Vdd switch (Q1) comes on to initiate
voltage boosting, full-duty switching is observed prior to the soft-start motion, as can be seen in
Waveform 1, and a failure occurs, causing a large rush current to flow from VIN and the VIN voltage to
drop. This occurs if the VOUT terminal voltage falls (VIN x RB
and RB when the Vdd switch (Q1) comes on. As a result, an extended period is required to set the
output voltage of the internal error amplifier circuit. One means of preventing this malfunction of the
internal error amplifier circuit is turning off Q2 at the moment the Vdd switch (Q1) goes off, so that
VOUT will be made equal to the VDD level via RA, as shown in Figure 2. (Normally, RA and RB are cut
off in order to eliminate the reactive current generated when the power is switched off.)
FAQ No.: 11S8323011
VIN
3.3V
ON/OFF
-
10uF
Cin
-11.0
-13.0
-1.0
-3.0
-5.0
-7.0
-9.0
7.0
5.0
3.0
1.0
-0.001
Coil current
Q1 on
Fault phenomenon
CONT voltage
Q1
0.000
150uH
L
Tr1
0.001
TIME
(sec)
Figure 2
Waveform 1
Soft-start motion
0.001
VDD
EXT
SD
S-8327E50
Internal
Circuit
50
VSS
0.002
VOUT
ON/OFF
Q2
0.002
RA
RB
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
-0.1
CONT
IL
CC
Coil Current (A)
(RA+RB)) due to the addition of RA
20uF
15V
Cout
OUT
GND

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