S-1167 Seiko Instruments, S-1167 Datasheet - Page 14

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S-1167

Manufacturer Part Number
S-1167
Description
HIGH RIPPLE REJECTION AND LOW DROPOUT CMOS VOLTAGE REGULATOR
Manufacturer
Seiko Instruments
Datasheet

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14
ULTRA LOW CURRENT CONSUMPTION, HIGH RIPPLE REJECTION AND LOW DROPOUT CMOS VOLTAGE REGULATOR
S-1167 Series
3. Shutdown Pin (ON / OFF Pin)
This pin starts and stops the regulator.
When the ON / OFF pin is set to the shutdown level, the operation of all internal circuits stops, and the built-in P-
channel MOS FET output transistor between the VIN pin and VOUT pin is turned off to substantially reduce the
current consumption. The VOUT pin becomes the V
between the VOUT pin and VSS pin.
The structure of the ON / OFF pin is as shown in Figure 13 . Since the ON / OFF pin is neither pulled down nor
pulled up internally, do not use it in the floating state. In addition, note that the current consumption increases if a
voltage of 0.3 V to V
VSS pin if the product type is “A” and to the VIN pin if it is “B”.
Product Type
A
A
B
B
IN
“H” : Power off
“H” : Power on
“L” : Power on
“L” : Power off
ON / OFF Pin
− 0.3 V is applied to the ON / OFF pin. When the ON / OFF pin is not used, connect it to the
Internal Circuit
ON / OFF
Seiko Instruments Inc.
Operaing
Operaing
Stopped
Stopped
Table 7
Figure 13
SS
level due to the internally divided resistance of several MΩ
VOUT Pin Voltage
Set value
Set value
VSS
V
V
SS
SS
level
level
VIN
Current Consumption
I
I
I
I
SS1
SS2
SS2
SS1
Rev.2.3
_00

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