AD1853 Analog Devices, AD1853 Datasheet - Page 3

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AD1853

Manufacturer Part Number
AD1853
Description
Stereo/ 24-Bit/ 192 kHz/ Multibit DAC
Manufacturer
Analog Devices
Datasheet

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POWER
Supplies
Dissipation
Power Supply Rejection Ratio
Specifications subject to change without notice.
TEMPERATURE RANGE
Specifications Guaranteed
Functionality Guaranteed
Storage
Specifications subject to change without notice.
DIGITAL FILTER CHARACTERISTICS
Sample Rate (kHz)
44.1
48
96
192
Specifications subject to change without notice.
GROUP DELAY
Chip Mode
INT8x Mode
INT4x Mode
INT2x Mode
Specifications subject to change without notice.
DIGITAL TIMING (Guaranteed Over 0 C to +70 C, AV
t
t
t
t
t
t
t
t
t
t
t
*Higher MCLK frequencies are allowable when using the on-chip Master Clock Auto-Divide feature.
Specifications subject to change without notice.
REV. A
DMP
DML
DMH
DBH
DBL
DBP
DLS
DLH
DDS
DDH
PDRP
Voltage, Analog and Digital
Analog Current
Digital Current
Operation—Both Supplies
Operation—Analog Supply
Operation—Digital Supply
1 kHz 300 mV p-p Signal at Analog Supply Pins
20 kHz 300 mV p-p Signal at Analog Supply Pins
MCLK Period (With F
MCLK LO Pulsewidth (All Modes)
MCLK HI Pulsewidth (All Modes)
BCLK HI Pulsewidth
BCLK LO Pulsewidth
BCLK Period
LRCLK Setup
LRCLK Hold (DSP Serial Port Mode Only)
SDATA Setup
SDATA Hold
PD/RST LO Pulsewidth
Passband (kHz)
DC–20
DC–21.8
DC–39.95
DC–87.2
Group Delay Calculation
5553/(128 × F
5601/(64 × F
5659/(32 × F
S
S
)
)
S
)
MCLK
Stopband (kHz)
24.1–328.7
26.23–358.28
56.9–327.65
117–327.65
= 256 × F
DD
= DV
LRCLK
–3–
DD
)*
F
48 kHz
96 kHz
192 kHz
S
= +5.0 V
Stopband Attenuation (dB)
110
110
115
95
Min
4.5
Min
0
–55
10%)
Min
54
0.4 × t
0.4 × t
20
20
140
20
5
5
10
5
Typ
5
12
28
200
60
140
–77
–72
Typ
25
Group Delay
903.8
911.6
921
DMP
DMP
Max
5.5
15
33
Max
70
125
Passband Ripple (dB)
± 0.0002
± 0.0002
± 0.0005
+0/–0.04 (DC–21.8 kHz)
+0/–0.5 (DC–65.4 kHz)
+0/–1.5 (DC–87.2 kHz)
AD1853
Units
V
mA
mA
mW
mW
mW
dB
dB
Units
°C
°C
°C
Units
µs
µs
µs
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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