BC41B143A-ds-003Pc CSR, BC41B143A-ds-003Pc Datasheet - Page 34

• Manufacturer Part Number: BC41B143A-ds-003Pc
• Description: Blue Core ROM Plug-n-Go
• Manufacturer: CSR

8.6
8.6.1
The Memory Management Unit (MMU) provides a number of dynamically allocated ring buffers that hold the data that
is in transit between the host and the air. The dynamic allocation of memory ensures efficient use of the available
Random Access Memory (RAM) and is performed by a hardware MMU to minimise the overheads on the processor
during data/voice transfers.
8.6.2
During radio transmission the Burst Mode Controller (BMC) constructs a packet from header information previously
loaded into memory-mapped registers by the software and payload data/voice taken from the appropriate ring buffer
in the RAM. During radio reception, the BMC stores the packet header in memory-mapped registers and the payload
data in the appropriate ring buffer in RAM. This architecture minimises the intervention required by the processor
during transmission and reception.
8.6.3
Dedicated logic is used to perform the following:
The following voice data translations and operations are performed by firmware:
The hardware suports all optional and mandatory features of Bluetooth v2.0 + EDR including AFH and eSCO.
8.6.4
48Kbytes of on-chip RAM is provided to support the RISC MCU and is shared between the ring buffers used to hold
voice/data for each active connection and the general purpose memory required by the Bluetooth stack.
8.6.5
4Mbits of metal programmable ROM is provided for system firmware implementation.
8.6.6
This is a full speed Universal Serial Bus (USB) interface for communicating with other compatible digital devices.
BlueCore4-ROM Plug-n-Go acts as a USB peripheral, responding to requests from a master host controller such as
a PC.
8.6.7
This is a synchronous serial port interface (SPI) for interfacing with other digital devices. The SPI port can be used for
system debugging. It can also be used for programming the Flash memory.
8.6.8
This is a standard Universal Asynchronous Receiver Transmitter (UART) interface for communicating with other serial
devices.
BC41B143A-ds-003Pc
Forward error correction
Header error control
Cyclic redundancy check
Encryption
Data whitening
Access code correlation
Audio transcoding
A-law/µ-law/linear voice data (from host)
A-law/µ-law/Continuously Variable Slope Delta (CVSD) (over the air)
Voice interpolation for lost packets
Rate mismatches
Baseband and Logic
Memory Management Unit
Burst Mode Controller
Physical Layer Hardware Engine DSP
RAM (48Kbytes)
ROM
USB
Synchronous Serial Interface
UART
© Cambridge Silicon Radio Limited 2005
Advance Information
Description of Functional Blocks
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