74ACTQ18825MTD Fairchild Semiconductor, 74ACTQ18825MTD Datasheet - Page 4

• Manufacturer Part Number: 74ACTQ18825MTD
• Description: IC BUFF DVR TRI-ST 16BIT 56TSSOP
• Manufacturer: Fairchild Semiconductor
• Series: 74ACTQr

Specifications of 74ACTQ18825MTD

• Logic Type: Buffer/Line Driver, Non-Inverting
• Number Of Elements: 2
• Number Of Bits Per Element: 9
• Current - Output High, Low: 24mA, 24mA
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 56-TSSOP
• Logic Family: ACTQ
• Number Of Channels Per Chip: 18
• Polarity: Non-Inverting
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• High Level Output Current: - 24 mA
• Low Level Output Current: 24 mA
• Minimum Operating Temperature: - 40 C
• Number Of Lines (input / Output): 18 / 3
• Output Type: 3-State
• Propagation Delay Time: 8.7 ns at 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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t
t
t
t
t
t
C
C
t
t
t
t
t
t
t
(Note 13)
t
(Note 13)
t
(Note 13)
PHL
PLH
PZL
PZH
PLZ
PHZ
PLH
PHL
PZH
PZL
PHZ
PLZ
OSHL
OSLH
OST
AC Electrical Characteristics
Note 8: Voltage Range 5.0 is 5.0V
Extended AC Electrical Characteristics
Note 9: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase
(i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.).
Note 10: This specification is guaranteed but not tested. The limits represent propagation delays with 250 pF load capacitors in place of the 50 pF load
capacitors in the standard AC load. This specification pertains to single output switching only.
Note 11: 3-STATE delays are load dominated and have been excluded from the datasheet.
Note 12: The Output Disable Time is dominated by the RC network (500 , 250 pF) on the output and has been excluded from the datasheet.
Note 13: Skew is defined as the absolute value of the difference between the actual propagation delays for any two separate outputs of the same device.
The specification applies to any outputs switching HIGH-to-LOW (t
to-LOW (t
Capacitance
IN
PD
Symbol
Symbol
Symbol
OST
).
Propagation Delay
Data to Output
Output Enable
Time
Output Disable
Time
Propagation Delay
Data to Output
Output Enable Time
Output Disable Time
Pin to Pin Skew
HL Data to Output
Pin to Pin Skew
LH Data to Output
Pin to Pin Skew
LH/HL Data to Output
Input Pin Capacitance
Power Dissipation Capacitance
Parameter
Parameter
0.5V.
Parameter
(Note 8)
V
5.0
5.0
5.0
(V)
CC
OSHL
Min
6.5
5.5
6.1
6.5
3.1
3.5
), LOW-to-HIGH (t
16 Outputs Switching
T
4
Min
A
Typ
4.5
2.0
2.0
2.0
2.0
1.5
1.5
95
V
C
CC
(Note 9)
40 C to 85 C
L
Typ
8.0
6.5
7.6
7.8
5.0
5.2
50 pF
T
C
Com
A
L
OSLH
Typ
5.3
5.6
6.3
6.5
4.5
5.1
50 pF
), or any combination switching LOW-to-HIGH and/or HIGH-
25 C
Units
pF
pF
Max
9.8
8.9
9.2
9.4
6.1
6.5
1.5
2.0
2.0
Max
8.4
8.7
9.6
9.7
7.3
8.5
V
V
CC
CC
T
A
Min
T
5.0V
5.0V
A
Min
C
2.0
2.0
2.0
2.0
1.5
1.5
V
(Note 10)
L
(Note 11)
(Note 12)
CC
40 C to 85 C
C
40 C to 85 C
L
250 pF
Com
50 pF
Conditions
Max
Max
10.3
10.4
9.0
7.6
8.8
9.2
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns