HA118144AF ETC, HA118144AF Datasheet - Page 18

• Manufacturer Part Number: HA118144AF
• Description: Video Camera CDS/AGC IC
• Manufacturer: ETC

HA118144AF
Operation
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18
CDS (correlated double sampling) circuit
A CCD image sensor alternately outputs a
noise segment (the A period signal) and a
signal segment (the B period signal) that
includes noise. Since the main noise generated
by the image sensor is low frequency noise,
and that noise is added to the signal, this noise
is a factor in S/N ratio degradation.
The CDS circuit removes the low frequency
noise by first clamping the image sensor output
signal noise segment (the A period signal) to a
fixed voltage, and then replacing the noise
segment with the signal segment by sampling
and holding the signal segment (B period),
which includes noise. Thus the CDS circuit
generates a continuous signal, and consists of a
clamping circuit, and sample and hold circuit,
and inverting amplifier. (See figures 2 and 3.)
Input
1
2
CLAMP
SP1
Figure 2 CDS Circuit
4
SP2
S/H
— Clamp circuit (CLAMP)
— Sample and hold circuit (S/H)
— Following the inverting amplifier, the signal is
3
This circuit removes low frequency noise by
clamping the input signal 1 noise segment
(A period) to a fixed voltage using the SP1
sample/hold pulse, and supplies its output
signal to the sample and hold circuit. (See
figures 2 and 3 4 .)
This is a circuit that samples and holds the
signal segment, and uses the SP2 sample/hold
pulse to sample the signal segment (B period)
and replace the noise segment with the signal
segment to generate a continuous signal. (See
figures 2 and 3 5 .)
supplied to the gain select circuit.
5
AMP
HA118144AF
Output