PIC18F6620 Microchip, PIC18F6620 Datasheet - Page 267

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PIC18F6620

Manufacturer Part Number
PIC18F6620
Description
Microcontroller
Manufacturer
Microchip
Datasheet

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24.1
ADDLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
 2004 Microchip Technology Inc.
Q Cycle Activity:
Before Instruction
After Instruction
Decode
Instruction Set
W
W
Q1
=
=
PIC18F6520/8520/6620/8620/6720/8720
0x10
0x25
ADD literal to W
[ label ] ADDLW
0
(W) + k
N, OV, C, DC, Z
The contents of W are added to the
8-bit literal ‘k’ and the result is
placed in W.
1
1
literal ‘k’
ADDLW
Read
0000
Q2
k
255
0x15
W
1111
Process
Data
Q3
k
kkkk
Write to W
Q4
kkkk
ADDWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
W
REG
W
REG
Q1
=
=
=
=
register ‘f’
ADD W to f
[ label ] ADDWF
0
d
a
(W) + (f)
N, OV, C, DC, Z
Add W to register ‘f’. If ‘d’ is ‘0’, the
result is stored in W. If ‘d’ is ‘1’, the
result is stored back in register ‘f’
(default). If ‘a’ is ‘0’, the Access
Bank will be selected. If ‘a’ is ‘1’,
the BSR is used.
1
1
ADDWF
Read
0010
Q2
0x17
0xC2
0xD9
0xC2
f
[0,1]
[0,1]
255
01da
REG, 0, 0
dest
Process
Data
Q3
DS39609B-page 265
f [,d [,a] f [,d [,a]
ffff
destination
Write to
Q4
ffff

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