PIC16C773 Microchip Technology, PIC16C773 Datasheet - Page 56

• Manufacturer Part Number: PIC16C773
• Description: 28/40-Pin/ 8-Bit CMOS Microcontrollers w/ 12-Bit A/D
• Manufacturer: Microchip Technology

PIC16C77X
FIGURE 8-3:
DS30275A-page 56
bit 7:
bit 6:
bit 5:
bit 4:
bit 3:
bit 2:
bit 1:
bit 0:
GCEN
R/W-0
Note:
bit7
RSEN: Repeated Start Condition Enabled bit (In I
SEN: Start Condition Enabled bit (In I
GCEN: General Call Enable bit (In I
1 = Enable interrupt when a general call address (0000h) is received in the SSPSR.
0 = General call address disabled.
AKSTAT: Acknowledge Status bit (In I
In master transmit mode:
1 = Acknowledge was not received from slave
0 = Acknowledge was received from slave
AKDT: Acknowledge Data bit (In I
In master receive mode:
Value that will be transmitted when the user initiates an Acknowledge sequence at the end of a receive.
1 = Not Acknowledge
0 = Acknowledge
AKEN: Acknowledge Sequence Enable bit (In I
In master receive mode:
1 = Initiate Acknowledge sequence on SDA and SCL pins, and transmit AKDT data bit. Automatically
cleared by hardware.
0 = Acknowledge sequence idle
RCEN: Receive Enable bit (In I
1 = Enables Receive mode for I
0 = Receive idle
PEN: Stop Condition Enable bit (In I
SCK release control
1 = Initiate Stop condition on SDA and SCL pins. Automatically cleared by hardware.
0 = Stop condition idle
1 = Initiate Repeated Start condition on SDA and SCL pins. Automatically cleared by hardware.
0 = Repeated Start condition idle.
1 = Initiate Start condition on SDA and SCL pins. Automatically cleared by hardware.
0 = Start condition idle.
AKSTAT
For bits AKEN, RCEN, PEN, RSEN, SEN: If the I
set (no spooling), and the SSPBUF may not be written (or writes to the SSPBUF are disabled).
R/W-0
SSPCON2: SYNC SERIAL PORT CONTROL REGISTER2 (ADDRESS 91h)
R/W-0
AKDT
R/W-0
AKEN
2
2
Advance Information
C master mode only).
C
R/W-0
RCEN
2
C master mode only)
2
2
2
C master mode only).
C slave mode only)
C master mode only)
2
C master mode only)
R/W-0
PEN
2
C master mode only).
2
C master mode only)
2
C module is not in the idle mode, this bit may not be
R/W-0
RSEN
R/W-0
SEN
bit0
W =Writable bit
U =Unimplemented bit,
Read as ‘0’
- n =Value at POR reset
R =Readable bit
1999 Microchip Technology Inc.