DS3903 Maxim Integrated Products, DS3903 Datasheet - Page 4

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DS3903

Manufacturer Part Number
DS3903
Description
DS3903 Triple 128-Position Nonvolatile Digital Potentiometer
Manufacturer
Maxim Integrated Products
Datasheet

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(V
Triple 128-Position Nonvolatile
Digital Potentiometer
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
Note 10:
Note 11:
4
CC
160
140
120
100
80
60
40
20
______________________________________________________________________
0
= 5.0V, 10kΩ plots apply to both pot0 and pot2, T
-40
-30 -20 -10
All voltages are referenced to ground.
I
logic levels. Appropriate logic levels specify that logic inputs are within a 0.5V of ground or V
corresponding inactive state. WP must be disconnected or connected high.
I/O pins of fast mode devices must not obstruct the SDA and SCL lines if V
A fast mode device can be used in a standard mode system, but the requirement t
then be met. This is automatically the case if the device does not stretch the low period of the SCL signal.
If such a device does stretch the low period of the SCL signal, it must output the next data bit to the SDA
line t
After this period, the first clock pulse is generated.
The maximum t
SCL signal.
A device must internally provide a hold time of at least 300ns for the SDA signal (referred to the V
the SCL signal) in order to bridge the undefined region of the falling edge of SCL.
C
EEPROM write begins after a stop condition occurs.
Absolute linearity is used to measure expected wiper voltage as determined by wiper position in a
voltage-divider configuration.
Relative linearity is used to determine the change of wiper voltage between two adjacent wiper positions
in a voltage-divider configuration.
STANDBY SUPPLY CURRENT
STBY
B
—total capacitance of one bus line in picofarads, timing referenced to 0.9 x V
vs. TEMPERATURE
RMAX
TEMPERATURE (°C)
0
specified for V
10 20
+ t
30
SU:DAT
40
HD:DAT
50
V
V
CC
CC
60 70 80
= 5V
= 3V
CC
= 1000ns + 250ns = 1250ns before the SCL line is released.
has only to be met if the device does not stretch the low period (t
equal to 3.0V and 5.0V while control port logic pins are driven to the appropriate
10
8
6
4
2
0
0
A
= +25°C unless otherwise noted.)
vs. WIPER SETTING (10k
25
W-L RESISTANCE
WIPER SETTING
50
75
Typical Operating Characteristics
100
)
125
100
90
80
70
60
50
40
30
20
10
0
CC
0
is switched off.
vs. WIPER SETTING (90k
25
CC
SU:DAT
W-L RESISTANCE
and 0.1 x V
WIPER SETTING
50
LOW
> 250ns must
75
) of the
CC
CC
for the
100
IN MIN
.
)
125
of

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