74ABT244CMSA Fairchild Semiconductor, 74ABT244CMSA Datasheet - Page 4

• Manufacturer Part Number: 74ABT244CMSA
• Description: IC BUFF/DVR TRI-ST DUAL 20SSOP
• Manufacturer: Fairchild Semiconductor
• Series: 74ABTr

Specifications of 74ABT244CMSA

• Logic Type: Buffer/Line Driver, Non-Inverting
• Number Of Elements: 2
• Number Of Bits Per Element: 4
• Current - Output High, Low: 32mA, 64mA
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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t
t
t
t
t
t
f
t
t
t
t
t
t
V
V
V
V
V
PLH
PHL
PZH
PZL
PHZ
PLZ
TOGGLE
PLH
PHL
PZH
PZL
PHZ
PLZ
Symbol
DC Electrical Characteristics
(SOIC package)
Note 6: Max number of outputs defined as (n). n
Note 7: Max number of data inputs (n) switching. n
Guaranteed, but not tested.
Note 8: Max number of outputs defined as (n). n
AC Electrical Characteristics
(SOIC and SSOP package)
Extended AC Electrical Characteristics
(SOIC package)
Note 9: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase
(i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.).
Note 10: This specification is guaranteed but not tested. The limits represent propagation delay with 250 pF load capacitors in place of the 50 pF load
capacitors in the standard AC load. This specification pertains to single output switching only.
Note 11: This specification is guaranteed but not tested. The limits represent propagation delays for all paths described switching in phase
(i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.) with 250 pF load capacitors in place of the 50 pF load capacitors in the standard AC load.
Note 12: The 3-STATE delays are dominated by the RC network (500
Symbol
Symbol
OLP
OLV
OHV
IHD
ILD
Quiet Output Maximum Dynamic V
Quiet Output Minimum Dynamic V
Minimum HIGH Level Dynamic Output Voltage
Minimum HIGH Level Dynamic Input Voltage
Maximum LOW Level Dynamic Input Voltage
Max Toggle Frequency
Propagation Delay
Data to Outputs
Output Enable Time
Output Disable Time
Propagation Delay
Data to Outputs
Output Enable
Time
Output Disable
Time
Parameter
Parameter
Parameter
OL
OL


1 data inputs are driven 0V to 3V. One output at LOW. Guaranteed, but not tested.
1 data inputs are driven 0V to 3V. One output HIGH. Guaranteed, but not tested.

Min
Min
1.5
1.5
1.5
1.5
1.0
1.0
1.0
1.0
1.5
1.5
1.7
1.7
1 inputs switching 0V to 3V. Input-under-test switching: 3V to threshold (V
8 Outputs Switching
T
V
A
CC

T
C
C
40
V
A
(Note 9)
L
CC
L
q
C to
4.5V–5.5V
Typ
100
Typ
2.5
2.3
3.5
3.6
3.5
3.3

50 pF
50 pF
:
25

, 250 pF) on the output and have been excluded from the datasheet.
5V

q
C
85
q

C
Min
2.7
2.0
4
1.3
Max
Max
5.0
5.0
6.5
6.5
5.6
5.6
3.6
3.6
6.0
6.0
5.6
5.6

Typ
0.5
3.1
1.5
1.1
0.8
T
T
1 Output Switching
A
A
V
V
Min
Min
1.5
1.5
2.5
2.5
1.0
1.0
0.8
1.2
1.2
1.0
CC
CC
C

C

(Note 10)
(Note 12)
55
L
40
L
Max
0.8
0.8
q
4.5V–5.5V
4.5V–5.5V
q
C to
250 pF
C to
50 pF


Max
Max
6.0
6.0
7.5
7.5
125
5.3
5.0
6.5
7.9
7.6
7.9
Units
85
V
V
V
V
V
q
q
C
C
8 Outputs Switching
T
V
T
5.0
5.0
5.0
5.0
5.0
A
A
CC
V
V
Min
Min
2.5
2.5
2.5
2.5
1.0
1.0
1.5
1.5
1.7
1.7
CC
CC
C

C

(Note 11)
(Note 12)
L
40
40
ILD
L
T
T
T
T
T
4.5V–5.5V
4.5V–5.5V
q
A
A
A
A
A
q
), 0V to threshold (V
250 pF
C to
C to
50 pF
25
25
25
25
25

Max
10.0
12.0

Max
q
q
q
q
q
8.5
8.5
Conditions
C
3.6
3.6
6.0
6.0
5.6
5.6
R
85
C (Note 6)
C (Note 6)
C (Note 8)
C (Note 7)
C (Note 7)
85
L
L
q
q
C
C
50 pF,
500
:
Units
Units
MHz
IHD
ns
ns
ns
ns
ns
ns
).