PIC12F519 Microchip Technology, PIC12F519 Datasheet - Page 43

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PIC12F519

Manufacturer Part Number
PIC12F519
Description
8-Bit Flash Microcontroller
Manufacturer
Microchip Technology
Datasheet

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8.3.1
This Configuration bit, when unprogrammed (left in the
‘1’ state), enables the external MCLR function. When
programmed, the MCLR function is tied to the internal
V
FIGURE 8-6:
8.4
The PIC12F519 device incorporates an on-chip
Power-on Reset (POR) circuitry, which provides an
internal chip Reset for most power-up situations.
The on-chip POR circuit holds the chip in Reset until
V
ation. To take advantage of the internal POR, program
the RB3/MCLR/V
resistor to V
case, an internal weak pull-up resistor is implemented
using a transistor (refer to Table 11-2 for the pull-up
resistor ranges). This will eliminate external RC compo-
nents usually needed to create a Power-on Reset. A
maximum rise time for V
Section 11.0 “Electrical Characteristics” for details.
When the devices start normal operation (exit the
Reset condition), device operating parameters (volt-
age, frequency, temperature,...) must be met to ensure
operation. If these conditions are not met, the devices
must be held in Reset until the operating parameters
are met.
A simplified block diagram of the on-chip Power-on
Reset circuit is shown in Figure 8-7.
© 2007 Microchip Technology Inc.
DD
DD
MCLRE
RBWU
and the pin is assigned to be a I/O. See Figure 8-6.
has reached a high enough level for proper oper-
Power-on Reset (POR)
MCLR ENABLE
DD
, or program the pin as RB3, in which
PP
pin as MCLR and tie through a
MCLR SELECT
DD
RB3/MCLR/V
is specified. See
Internal MCLR
PP
Preliminary
The Power-on Reset circuit and the Device Reset
Timer (see Section 8.5 “Device Reset Timer (DRT)”)
circuit are closely related. On power-up, the Reset latch
is set and the DRT is reset. The DRT timer begins
counting once it detects MCLR to be high. After the
time-out period, which is typically 18 ms or 1 ms, it will
reset the Reset latch and thus end the on-chip Reset
signal.
A power-up example where MCLR is held low is shown
in Figure 8-8. V
bringing MCLR high. The chip will actually come out of
Reset T
In Figure 8-9, the on-chip Power-on Reset feature is
being used (MCLR and V
is programmed to be RB3). The V
the Start-up timer times out and there is no problem in
getting a proper Reset. However, Figure 8-10 depicts a
problem situation where V
between when the DRT senses that MCLR is high and
when MCLR and V
too long. In this situation, when the start-up timer times
out, V
chip may not function correctly. For such situations, we
recommend that external RC circuits be used to
achieve longer POR delay times (Figure 8-9).
Note:
DD
DRT
has not reached the V
When the devices start normal operation
(exit the Reset condition), device operat-
ing parameters (voltage, frequency, tem-
perature, etc.) must be met to ensure
operation. If these conditions are not met,
the device must be held in Reset until the
operating conditions are met.
after MCLR goes high.
DD
is allowed to rise and stabilize before
DD
actually reach their full value, is
DD
DD
PIC12F519
are tied together or the pin
rises too slowly. The time
DD
(min) value and the
DD
DS41319A-page 41
is stable before

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