ADC0816CCJ National Semiconductor, ADC0816CCJ Datasheet - Page 4

• Manufacturer Part Number: ADC0816CCJ
• Description: 8-Bit P Compatible A/D Converters with 16-Channel Multiplexer
• Manufacturer: National Semiconductor

www.national.com
CONTROL INPUTS
V
V
I
I
I
V
V
V
I
t
t
t
T
t
t
t
t
f
t
C
C
IN(1)
IN(0)
CC
OUT
WS
WALE
s
D
H1
1H,
C
c
EOC
Digital Levels and DC Specifications: ADC0816CCN, ADC0817CCN — 4.75V V
wise noted.
Timing Specifications: V
H
IN(1)
IN(0)
OUT(1)
OUT(0)
OUT(0)
Electrical Characteristics
Electrical Characteristics
IN
OUT
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating
the device beyond its specified operating conditions.
Note 2: All voltages are measured with respect to GND, unless otherwise specified.
Note 3: A zener diode exists, internally, from V
Note 4: Two on-chip diodes are tied to each analog input which will forward conduct for analog input voltages one diode drop below ground or one diode drop greater
than the V
than 100 mV, the output code will be correct. To achieve an absolute 0 V
V
Note 5: Total unadjusted error includes offset, full-scale, and linearity errors. See Figure 3 . None of these A/Ds requires a zero or full-scale adjust. However, if an
all zero code is desired for an analog input other than 0.0V, or if a narrow full-scale span exists (for example: 0.5V to 4.5V full-scale) the reference voltages can be
adjusted to achieve this. See Figure 13 .
Note 6: Comparator input current is a bias current into or out of the chopper stabilized comparator. The bias current varies directly with clock frequency and has little
temperature dependence ( Figure 6 ). See paragraph 4.0.
Note 7: If start pulse is asynchronous with converter clock or if f
at f
Note 8: The outputs of the data register are updated one clock cycle before the rising edge of EOC.
Note 9: Human body model, 100 pF discharged through a 1.5 k
Symbol
Symbol
, t
DC
DATA OUTPUTS AND EOC (INTERRUPT)
t
c
H0
0H
over temperature variations, initial tolerance and loading.
640 kHz take start high within 100 ns of clock going low.
CC
supply. The spec allows 100 mV forward bias of either diode. This means that as long as the analog V
Minimum Start Pulse Width
Minimum ALE Pulse Width
Minimum Address Set-Up Time
Minimum Address Hold Time
Analog MUX Delay Time
from ALE
OE Control to Q Logic State
OE Control to Hi-Z
Conversion Time
Clock Frequency
EOC Delay Time
Input Capacitance
TRI-STATE Output
Capacitance
Logical “1” Input Voltage
Logical “0” Input Voltage
Logical “1” Input Current
(The Control Inputs)
Logical “0” Input Current
(The Control Inputs)
Supply Current
Logical “1” Output Voltage
Logical “0” Output Voltage
Logical “0” Output Voltage EOC
TRI-STATE Output Current
Parameter
Parameter
CC
= V
REF(+)
= 5V, V
CC
to GND and has a typical breakdown voltage of 7 V
(Continued)
REF(−)
( Figure 5 ) (Note 7)
( Figure 5 )
( Figure 5 )
( Figure 5 )
R
C
C
f
( Figure 5 )
At Control Inputs
At TRI-STATE Outputs (Note 8)
c
= GND, t
c
S
L
L
= 640 kHz, ( Figure 5 ) (Note 8)
V
V
f
I
I
I
I
V
V
CLK
O
O
O
O
>
= 50 pF, R
= 10 pF, R
= O
IN
IN
O
O
resistor.
= −360 µA, T
= −300 µA, T
= 1.6 mA
= 1.2 mA
640 kHz, the minimum start pulse width is 8 clock periods plus 2 µs. For synchronous operation
= V
= 0
= 15V
= 0
= 640 kHz
CC
( Figure 5 )
DC
r
= t
Conditions
to 5 V
f
Conditions
= 20 ns and T
L
L
= 10k ( Figure 8 )
= 10k ( Figure 8 )
4
DC
A
A
= 85˚C
= 125˚C
input voltage range will therefore require a minimum supply voltage of 4.900
A
= 25˚C unless otherwise noted.
DC
CC
.
V
V
CC
CC
5.25V, −40˚C T
−1.0
−3.0
Min
−1.5
−0.4
Min
90
10
IN
0
does not exceed the supply voltage by more
Typ
100
100
125
125
100
640
Typ
25
25
10
10
0.3
1
A
+85˚C unless other-
8+2µs
1280
Max
200
200
250
250
116
2.5
Max
0.45
0.45
50
50
15
15
1.5
1.0
3.0
3.0
Periods
Units
Clock
Units
kHz
mA
ns
ns
ns
ns
µs
ns
ns
µs
pF
pF
µA
µA
µA
µA
V
V
V
V
V