ADC08134 National Semiconductor, ADC08134 Datasheet - Page 5

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ADC08134

Manufacturer Part Number
ADC08134
Description
8-Bit High-Speed Serial I/O A/D Converters with Multiplexer Options/ Voltage Reference/ and Track/Hold Function
Manufacturer
National Semiconductor
Datasheet

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T
t
t
t
t
t
t
C
C
CA
SELECT
SET-UP
HOLD
pd1
1H
The following specifications apply for V
limits apply for T
Symbol
C
IN
OUT
Electrical Characteristics
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
Note 2: Operating Ratings indicate conditions for which the device is functional. These ratings do not guarantee specific performance limits. For guaranteed speci-
fications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance character-
istics may degrade when the device is not operated under the listed test conditions.
Note 3: All voltages are measured with respect to AGND = DGND = 0 V
Note 4: When the input voltage (V
5 mA. The 20 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 5 mA to four
pins.
Note 5: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
allowable power dissipation at any temperature is P
T
ADC08138.
Note 6: Human body model, 100 pF capacitor discharged through a 1.5 k
Note 7: See AN450 “Surface Mounting Methods and Their Effect on Product Reliability” or Linear Data Book section “Surface Mount” for other methods of soldering
surface mount devices.
Note 8: Typicals are at T
Note 9: Guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 10: Total unadjusted error includes zero, full-scale, linearity, and multiplexer error. Total unadjusted error with V
ADC08138. See (Note 16).
Note 11: Cannot be tested for the ADC08131.
Note 12: For V
analog input voltages one diode drop below ground or one diode drop greater than V
(e.g., 5V) can cause an input diode to conduct, especially at elevated temperatures. This will cause errors for analog inputs near full-scale. The specification allows
50 mV forward bias of either diode; this means that as long as the analog V
Exceeding this range on an unselected channel will corrupt the reading of a selected channel. Achievement of an absolute 0 V
therefore require a minimum supply voltage of 4.950 V
Note 13: Channel leakage current is measured after a single-ended channel is selected and the clock is turned off. For off channel leakage current the following two
cases are considered: one, with the selected channel tied high (5 V
nels is measured; two, with the selected channel tied low and the off channels tied high, total current flow through the off channels is again measured. The two cases
considered for determining on channel leakage current are the same except total current flow through the selected channel is measured.
Note 14: A 40% to 60% duty cycle range insures proper operation at all clock frequencies. In the case that an available clock has a duty cycle outside of these limits
the minimum time the clock is high or low must be at least 450 ns. The maximum time the clock can be high or low is 100 µs.
Note 15: Since data, MSB first, is the output of the comparator used in the successive approximation loop, an additional delay is built in (see Block Diagram) to allow
for comparator response time.
Note 16: For the ADC08131 V
reference current (700 µA typical, 2 mA maximum).
Note 17: Load regulation test conditions and specifications for the ADC08131 differ from those of the ADC08134 and ADC08138 because the ADC08131 has the
on-board reference as a permanent load.
JMAX
, t
, t
0H
pd0
= 125˚C. The typical thermal resistances (
IN(−)
Conversion Time (Not Including
MUX Addressing Time)
Acquisition Time
CLK High while CS is High
CS Falling Edge or Data Input
Valid to CLK Rising Edge
Data Input Valid after CLK Rising
Edge
CLK Falling Edge to Output Data
Valid (Note 15)
TRI-STATE Delay from Rising Edge
of CS to Data Output and SARS
Hi-Z
Capacitance of Logic Inputs
Capacitance of Logic Outputs
V
A
IN(+)
= T
J
= 25˚C and represent the most likely parametric norm.
the digital code will be 0000 0000. Two on-chip diodes are tied to each analog input (see Block Diagram) which will forward-conduct for
J
REF
Parameter
= T
IN is internally tied to the on chip 2.5V band-gap reference output; therefore, the supply current is larger because it includes the
IN
MIN
) at any pin exceeds the power supplies (V
to T
MAX
CC
D
JA
; all other limits T
= (T
) of these parts when board mounted for the ADC 08131 and the ADC08134 is 140˚C/W and 91˚C/W for the
= +5 V
DC
(Continued)
JMAX
over temperature variations, initial tolerance and loading.
− T
DC
A
, V
)/
DC
f
C
Data MSB First
Data LSB First
C
(see TRI-STATE Test Circuits)
C
CLK
L
L
L
JA
) and the remaining seven off channels tied low (0 V
REF
= 100 pF:
= 10 pF, R
= 100 pF, R
or the number given in the Absolute Maximum Ratings, whichever is lower. For these devices
= 1 MHz
IN
DC
A
= +2.5 V
does not exceed the supply voltage by more than 50 mV, the output code will be correct.
, unless otherwise specified.
resistor.
= T
Conditions
IN
5
J
<
CC
= 25˚C.
L
(AGND or DGND) or V
DC
L
supply. During testing at low V
= 10 k
= 2 k
and t
r
= t
f
JMAX
= 20 ns unless otherwise specified. Boldface
IN
,
>
JA
(Note 8)
Typical
AV
and the ambient temperature, T
CC
50
50
REF
CC
5
5
) the current at that pin should be limited to
levels (e.g., 4.5V), high level analog inputs
DC
= +5V only applies to the ADC08134 and
), total current flow through the off chan-
DC
to 5 V
(Note 9)
Limits
250
200
180
25
20
1
8
8
DC
2
input voltage range will
A
. The maximum
www.national.com
1/f
1/f
µs (max)
ns (max)
ns (max)
ns (max)
ns (min)
ns (min)
(Limits)
CLK
CLK
Units
pF
pF
ns
ns
(max)
(max)

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