ADC0808 National Semiconductor, ADC0808 Datasheet - Page 4

• Manufacturer Part Number: ADC0808
• Description: 8-Bit uP Compatible A/D Converters with 8-Channel Multiplexer
• Manufacturer: National Semiconductor

www.national.com
DATA OUTPUTS AND EOC (INTERRUPT)
V
V
V
I
t
t
t
t
t
t
t
t
f
t
C
C
WS
WALE
s
H
D
H1
1H
c
c
EOC
OUT
Digital Levels and DC Specifications: ADC0808CCN, ADC0808CCV, ADC0809CCN and ADC0809CCV, 4.75 V
−40˚C T
Timing Specifications V
OUT(1)
OUT(0)
OUT(0)
IN
OUT
Electrical Characteristics
Electrical Characteristics
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating
the device beyond its specified operating conditions.
Note 2: All voltages are measured with respect to GND, unless othewise specified.
Note 3: A zener diode exists, internally, from V
Note 4: Two on-chip diodes are tied to each analog input which will forward conduct for analog input voltages one diode drop below ground or one diode drop greater
than the V
than 100 mV, the output code will be correct. To achieve an absolute 0V
over temperature variations, initial tolerance and loading.
Note 5: Total unadjusted error includes offset, full-scale, linearity, and multiplexer errors. See Figure 3 . None of these A/Ds requires a zero or full-scale adjust. How-
ever, if an all zero code is desired for an analog input other than 0.0V, or if a narrow full-scale span exists (for example: 0.5V to 4.5V full-scale) the reference voltages
can be adjusted to achieve this. See Figure 13 .
Note 6: Comparator input current is a bias current into or out of the chopper stabilized comparator. The bias current varies directly with clock frequency and has little
temperature dependence ( Figure 6 ). See paragraph 4.0.
Note 7: The outputs of the data register are updated one clock cycle before the rising edge of EOC.
Note 8: Human body model, 100 pF discharged through a 1.5 k
Symbol
, t
, t
Symbol
H0
0H
CC
A
n supply. The spec allows 100 mV forward bias of either diode. This means that as long as the analog V
+85˚C unless otherwise noted
Minimum Start Pulse Width
Minimum ALE Pulse Width
Minimum Address Set-Up Time
Minimum Address Hold Time
Analog MUX Delay Time
From ALE
OE Control to Q Logic State
OE Control to Hi-Z
Conversion Time
Clock Frequency
EOC Delay Time
Input Capacitance
TRI-STATE Output
Capacitance
Logical “1” Output Voltage
Logical “0” Output Voltage
Logical “0” Output Voltage EOC
TRI-STATE Output Current
Parameter
CC
Parameter
= V
REF(+)
= 5V, V
CC
to GND and has a typical breakdown voltage of 7 V
REF(−)
(Continued)
( Figure 5 )
( Figure 5 )
( Figure 5 )
( Figure 5 )
R
C
C
f
( Figure 5 )
At Control Inputs
At TRI-STATE Outputs
c
= GND, t
S
L
L
= 640 kHz, ( Figure 5 ) (Note 7)
= 50 pF, R
= 10 pF, R
= 0
resistor.
V
I
I
I
I
V
V
OUT
OUT
O
O
CC
O
O
DC
= 1.6 mA
= 1.2 mA
( Figure 5 )
= 5V
= 0
r
to 5V
= t
= 4.75V
= −360µA
= −10µA
Conditions
f
= 20 ns and T
Conditions
L
L
DC
= 10k ( Figure 8 )
= 10k ( Figure 8 )
4
input voltage range will therefore require a minimum supply voltage of 4.900 V
A
= 25˚C unless otherwise noted.
DC
.
Min
−3
MIn
90
10
0
IN
does not exceed the supply voltage by more
Typ
2.4
4.5
Typ
100
100
125
125
100
640
25
25
10
10
1
8+2 µS
Max
0.45
0.45
1280
Max
200
200
250
250
116
2.5
3
50
50
15
15
CC
5.25V,
V(min)
V(min)
Periods
Units
Units
Clock
µA
µA
kHz
pF
pF
V
V
ns
ns
ns
ns
µs
ns
ns
µs
DC