MT29F8G08FABWP Micron Technology, Inc, MT29F8G08FABWP Datasheet - Page 30
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MT29F8G08FABWP
Manufacturer Part Number
MT29F8G08FABWP
Description
Manufacturer
Micron Technology, Inc
Datasheet
1.MT29F8G08FABWP.pdf
(59 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MT29F8G08FABWP
Manufacturer:
MICRON
Quantity:
10
Table 9:
09005aef818a56a7 pdf/ 09005aef81590bdd source
2gb_nand_m29b__2.fm - Rev. H 9/05 EN
[15:8]
Bit
SR
0
1
2
3
4
5
6
7
Write protect
Ready/busy
Ready/busy
Program
Pass/fail
Page
Status Register Bit Definition
—
—
—
—
—
Notes: 1. Status register bit 5 is “0” during the actual programming operation. If cache mode is
Program Page
Cache Mode
Write protect
Pass/fail (N-1)
Ready/busy
Pass/fail (N)
Ready/busy
cache
2. Status register bit 6 is “1” when the cache is ready to accept new data. R/B# follows bit 6.
—
—
—
—
used, this bit will be “1” when all internal operations are complete.
See Figure 19 on page 26, and Figure 24 on page 32.
2
1
Write protect
Page Read
Ready/busy
Ready/busy
2, 4, and 8Gb x8/x16 Multiplexed NAND Flash Memory
—
—
—
—
—
—
Cache Mode
Write protect Write protect “0” = Protected
Ready/busy
Page Read
Ready/busy
30
cache
—
—
—
—
—
—
2
1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Block Erase
Ready/busy
Ready/busy
Pass/fail
—
—
—
—
—
“0” = Successful PROGRAM/ERASE
“1” = Error in PROGRAM/ERASE
“0” = Successful PROGRAM/ERASE
“1” = Error in PROGRAM/ERASE
“0”
“0”
“0”
“0” = Busy
“1” = Ready
“0” = Busy
“1” = Ready
“1” = Not protected
“0”
Command Definitions
©2004 Micron Technology, Inc. All rights reserved.
Definition