LPC2148 Philips, LPC2148 Datasheet - Page 21

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LPC2148

Manufacturer Part Number
LPC2148
Description
16/32 Bit Microcontroller
Manufacturer
Philips
Datasheet

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Preliminary data sheet
6.16.1 Features
6.17.1 Features
6.18.1 Features
6.16 SPI serial I/O controller
6.17 SSP serial I/O controller
6.18 General purpose timers/external event counters
The LPC2142/2148 each contain one SPI controller. The SPI is a full duplex serial
interface, designed to be able to handle multiple masters and slaves connected to a given
bus. Only a single master and a single slave can communicate on the interface during a
given data transfer. During a data transfer the master always sends a byte of data to the
slave, and the slave always sends a byte of data to the master.
The LPC2142/2148 each contain one SSP. The SSP controller is capable of operation on
a SPI, 4-wire SSI, or Microwire bus. It can interact with multiple masters and slaves on the
bus. However, only a single master and a single slave can communicate on the bus during
a given data transfer. The SSP supports full duplex transfers, with frames of 4 bits to
16 bits of data flowing from the master to the slave and from the slave to the master. Often
only one of these data flows carries meaningful data.
The Timer/Counter is designed to count cycles of the peripheral clock (PCLK) or an
externally supplied clock and optionally generate interrupts or perform other actions at
specified timer values, based on four match registers. It also includes four capture inputs
to trap the timer value when an input signal transitions, optionally generating an interrupt.
Multiple pins can be selected to perform a single capture or match function, providing an
application with ‘or’ and ‘and’, as well as ‘broadcast’ functions among them.
The LPC2142/2148 can count external events on one of the capture inputs if the minimum
external pulse is equal or longer than a period of the PCLK. In this configuration, unused
capture lines can be selected as regular timer capture inputs.
The I
Compliant with SPI specification.
Synchronous, serial, full duplex, communication.
Combined SPI master and slave.
Maximum data bit rate of one eighth of the input clock rate.
Compatible with Motorola’s SPI, TI’s 4-wire SSI and National Semiconductor’s
Microwire buses.
Synchronous serial communication.
Master or slave operation.
8-frame FIFOs for both transmit and receive.
Four bits to 16 bits per frame.
A 32-bit timer/counter with a programmable 32-bit prescaler.
2
C-bus may be used for test and diagnostic purposes.
Rev. 01 — 22 June 2005
Single-chip 16/32-bit microcontrollers
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
LPC2142/2148
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