AT93C46D ATMEL Corporation, AT93C46D Datasheet

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AT93C46D

Manufacturer Part Number
AT93C46D
Description
Three-wire Serial EEPROM
Manufacturer
ATMEL Corporation
Datasheet

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Features
Description
The AT93C46D provides 1024 bits of serial electrically erasable programmable read-
only memory (EEPROM), organized as 64 words of 16 bits each (when the ORG pin is
connected to VCC), and 128 words of 8 bits each (when the ORG pin is tied to
ground). The device is optimized for use in many industrial and commercial applica-
tions where low-power and low-voltage operations are essential. The AT93C46D is
available in space-saving 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Thin mini-
MAP (MLP 2x3), 8-lead TSSOP, and 8-lead dBGA2 packages.
The AT93C46D is enabled through the Chip Select pin (CS) and accessed via a
three-wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift
Clock (SK). Upon receiving a Read instruction at DI, the address is decoded and the
data is clocked out serially on the DO pin. The Write cycle is completely self-timed,
and no separate Erase cycle is required before Write. The Write cycle is only enabled
when the part is in the Erase/Write Enable state. When CS is brought high following
the initiation of a Write cycle, the DO pin outputs the Ready/Busy status of the part.
The AT93C46D is available in 1.8 (1.8V to 5.5V) version.
Table 1. Pin Configurations
Pin Name
CS
SK
DI
DO
GND
VCC
ORG
NC
Low-voltage and Standard-voltage Operation
User-selectable Internal Organization
Three-wire Serial Interface
2 MHz Clock Rate (5V)
Self-timed Write Cycle (5 ms max)
High Reliability
8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Thin mini-MAP (MLP 2x3), 8-lead
TSSOP and 8-ball dBGA2 Packages
– 1.8 (V
– 1K: 128 x 8 or 64 x 16
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
CC
= 1.8V to 5.5V)
Function
Chip Select
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
Power Supply
Internal Organization
No Connect
DO
CS
SK
DI
DO
CS
SK
DI
1
2
3
4
8-lead SOIC
8-lead PDIP
1
2
3
4
DO
CS
SK
DI
8
7
6
5
8
7
6
5
VCC
NC
ORG
GND
8-lead TSSOP
1
2
3
4
VCC
NC
ORG
GND
8-lead Ultra Thin mini-MAP (MLP 2x3)
8
7
6
5
ORG
GND
ORG
VCC
GND
VCC
NC
NC
VCC
NC
ORG
GND
8-lead dBGA2
Bottom View
Bottom View
8
7
6
5
8
7
6
5
1
2
3
4
CS
SK
D1
D0
1
2
3
4
CS
SK
DI
DO
Three-wire
Serial
EEPROM
1K (128 x 8 or 64 x 16)
AT93C46D
Preliminary
5193C–SEEPR–3/07
1

Related parts for AT93C46D

AT93C46D Summary of contents

Page 1

... PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Thin mini- MAP (MLP 2x3), 8-lead TSSOP, and 8-lead dBGA2 packages. The AT93C46D is enabled through the Chip Select pin (CS) and accessed via a three-wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift Clock (SK) ...

Page 2

... Meg ohm pullup, then the “x 16” organization is selected. 2. For the AT93C46D, if the “x 16” organization is the mode of choice and pin 6 (ORG) is left unconnected, Atmel see the AT93C46E datasheet. ...

Page 3

Table 2. Pin Capacitance Applicable over recommended operating range from T Symbol Test Conditions C Output Capacitance (DO) OUT C Input Capacitance (CS, SK, DI) IN Note: 1. This parameter is characterized and is not 100% tested. Table 3. ...

Page 4

... PD0 “0” Status t SV Valid High t DF Impedance t Write Cycle Time WP (1) Endurance 5.0V, 25°C Note: 1. This parameter is ensured by characterization. AT93C46D [Preliminary −40° 85° Test Condition 4.5V ≤ V ≤ 5.5V CC 2.7V ≤ V ≤ 5.5V CC 1.8V ≤ V ≤ 5.5V CC 4.5V ≤ V ≤ 5.5V CC 2.7V ≤ V ≤ ...

Page 5

... The AT93C46D is accessed via a simple and versatile three-wire serial communication interface. Device operation is controlled by seven instructions issued by the host pro- cessor. A valid instruction starts with a rising edge of CS and consists of a start bit (logic “1”) followed by the appropriate op code and the desired memory address location. ...

Page 6

... Erase/Write Disable (EWDS) instruction disables all programming modes and should be executed after all programming operations. The operation of the Read instruction is independent of both the EWEN and EWDS instructions and can be executed at any time. µs Table 6. Organization Key for Timing Diagrams AT93C46D (1K) I ...

Page 7

Figure 3. READ Timing High Impedance Figure 4. EWEN Timing Figure 5. EWDS Timing 5193C–SEEPR–3/07 ... ... ...

Page 8

... Figure 6. WRITE Timing HIGH IMPEDANCE DO (1) Figure 7. WRAL Timing HIGH IMPEDANCE DO Note: 1. Valid only 4.5V to 5.5V. CC Figure 8. ERASE Timing HIGH IMPEDANCE DO AT93C46D [Preliminary] 8 ... ... ... ... N-1 N BUSY ...

Page 9

Figure 9. ERAL Timing HIGH IMPEDANCE DO Note: 1. Valid only 4.5V to 5.5V. CC 5193C–SEEPR–3/ STANDBY CHECK STATUS BUSY HIGH IMPEDANCE ...

Page 10

... AT93C46D Ordering Information Ordering Code AT93C46D-PU (Bulk form only) (1) AT93C46DN-SH-B (NiPdAu Lead finish) (2) AT93C46DN-SH-T (NiPdAu Lead finish) (1) AT93C46D-TH-B (NiPdAu Lead finish) (2) AT93C46D-TH-T (NiPdAu Lead finish) (2) AT93C46DY6-YH-T (NiPdAu Lead finish) (2) AT93C46DU3-UU-T (3) AT93C46D-W-11 Notes: 1. “-B” denotes bulk 2. “-T” denotes tape and reel. SOIC = 4K per reel. TSSOP, Ultra Thin Mini MAP, and dBGA2 = 5K per reel. ...

Page 11

Packaging Information 8P3 – PDIP Top View PLCS Side View Notes: 1. This drawing is for general information only; refer to JEDEC Drawing MS-001, Variation BA for additional information. 2. Dimensions A and L are measured ...

Page 12

... JEDEC SOIC Top View e Side View Note: These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R AT93C46D [Preliminary TITLE 8S1, 8-lead (0.150" ...

Page 13

TSSOP Pin 1 indicator this corner N Top View Side View Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances, datums, ...

Page 14

... Bottem View 8 SOLDER BALLS 1. This drawing is for general information only. 2. Dimension 'b' is measured at maximum solder ball diameter. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R AT93C46D [Preliminary TITLE 8U3-1, 8-ball, 1.50 x 2.00 mm Body, 0.50 mm pitch, Small Die Ball Grid Array Package (dBGA2) 1 ...

Page 15

Mini-MAP D Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-229, for proper dimensions, tolerances, datums, etc. 2. Dimension b applies to metallized terminal and is measured between 0.15 mm and 0.30 mm ...

Page 16

... Revision History AT93C46D [Preliminary] 16 Doc. Rev. Date Comments 5193C 3/2007 Corrected Figures 4 and 5. 5193B 2/2007 Added ‘Ultra Thin’ description to 8-lead Mini-MAP package. 5193A 1/2007 Initial document release. 5193C–SEEPR–3/07 ...

Page 17

... Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. ©2007 Atmel Corporation. All rights reserved. Atmel marks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. Atmel Operations Memory ...

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