AT91SAM9260 ATMEL Corporation, AT91SAM9260 Datasheet - Page 17

• Manufacturer Part Number: AT91SAM9260
• Description: AT91 ARM Thumb Microcontrollers
• Manufacturer: ATMEL Corporation

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7.2
6221DS–ATARM–22-Sep-06
Bus Matrix
• Standard ARM v4 and v5 Memory Management Unit (MMU)
• Bus Interface Unit (BIU)
• 6-layer Matrix, handling requests from 6 masters
• Programmable Arbitration strategy
• Burst Management
• One Address Decoder provided per Master
• Boot Mode Select
• Remap Command
– Access Permission for Sections
– Access Permission for large pages and small pages can be specified separately
– 16 embedded domains
– Arbitrates and Schedules AHB Requests
– Separate Masters for both instruction and data access providing complete Matrix
– Separate Address and Data Buses for both the 32-bit instruction interface and the
– On Address and Data Buses, data can be 8-bit (Bytes), 16-bit (Half-words) or 32-
– Fixed-priority Arbitration
– Round-Robin Arbitration, either with no default master, last accessed default
– Breaking with Slot Cycle Limit Support
– Undefined Burst Length Support
– Three different slaves may be assigned to each decoded memory area: one for
– Non-volatile Boot Memory can be internal or external
– Selection is made by BMS pin sampled at reset
– Allows Remapping of an Internal SRAM in Place of the Boot Non-Volatile Memory
– Allows Handling of Dynamic Exception Vectors
for each quarter of the page
system flexibility
32-bit data interface
bit (Words)
master or fixed default master
internal boot, one for external boot, one after remap
AT91SAM9260 Preliminary
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