AT91FR40162SB ATMEL, AT91FR40162SB Datasheet - Page 13

• Manufacturer Part Number: AT91FR40162SB
• Description: AT91 ARM Thumb-based Microcontrollers
• Manufacturer: ATMEL

7.6.4
7.6.5
7.6.6
6410AS–ATARM–02-Jun-08
Abort Control
External Bus Interface
Flash Memory
be redefined dynamically by the software, the AT91FR40162SB uses a remap command that
enables switching between the boot memory and the internal primary SRAM bank addresses.
The remap command is accessible through the EBI User Interface by writing one in RCB of
EBI_RCR (Remap Control Register). Performing a remap command is mandatory if access to
the other external devices (connected to chip selects 1 to 7) is required. The remap operation
can only be changed back by an internal reset or an NRST assertion.
The abort signal providing a Data Abort or a Prefetch Abort exception to the ARM7TDMI is
asserted when accessing an undefined address in the EBI address space.
No abort is generated when reading the internal memory or by accessing the internal peripher-
als, whether the address is defined or not.
The External Bus Interface handles the accesses between addresses 0x0040 0000 and 0xFFC0
0000. It generates the signals that control access to the external devices, and can be configured
from eight 1-Mbyte banks up to four 16-Mbyte banks. It supports byte, half-word and word
aligned accesses.
For each of these banks, the user can program:
The External Bus Interface features also the Early Read Protocol, configurable for all the
devices, that significantly reduces access time requirements on an external device in the case of
single-clock cycle access.
In the AT91FR40162SB, the External Bus Interface connects internally to the Flash memory.
The 2-Mbyte Flash memory is organized as 1, 048, 576 words of 16 bits each. The Flash mem-
ory is addressed as 16-bit words via the EBI. It uses address lines A1 - A20 of the processor.
The address, data and control signals, except the Flash memory enable, are internally intercon-
nected. The user should connect the Flash memory enable (NCSF) to one of the active-low chip
selects on the EBI; NCS0 must be used if the Flash memory is to be the boot memory. In addi-
tion, if the Flash memory is to be used as boot memory, the BMS input must be pulled down
externally in order for the processor to perform correct 16-bit fetches after reset.
During boot, the EBI must be configured with correct number of standard wait states. As an
example, five standard wait states are required when the microcontroller is running at 66 MHz.
The user must ensure that all VDDIO, VDDCORE and all GND pins are connected to their
respective supplies by the shortest route. The Flash memory powers-on in read mode. Com-
mand sequences are used to place the device in other operating modes, such as program and
erase.
• Number of wait states
• Number of data float times (wait time after the access is finished to prevent any bus
• Data bus width (8-bit or 16-bit)
• With a 16-bit wide data bus, the user can program the EBI to control one 16-bit device (Byte
contention in case the device is too long in releasing the bus)
Access Select Mode) or two 8-bit devices in parallel that emulate a 16-bit memory (Byte
Write Access Mode).
AT91FR40162SB
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