EK43404-01 Peregrine Semiconductor Corp., EK43404-01 Datasheet

EK43404-01

Manufacturer Part Number

EK43404-01

Description

75 -RF Digital Attenuator 4-bit, 15 dB, DC - 2.0 GHz

Manufacturer

Peregrine Semiconductor Corp.

Datasheet

1.EK43404-01.pdf (11 pages)

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Power-Up Control

Product Description

The PE43404 is a high linearity, 4-bit RF Digital Step

Attenuator (DSA) covering a 15 dB attenuation range in 1.0 dB

steps. This 75-ohm RF DSA provides both parallel (latched or

direct mode) and serial CMOS control interface, operates on a

single 3-volt supply and maintains high attenuation accuracy

over frequency and temperature. It also has a unique control

interface that allows the user to select an initial attenuation

state at power-up. The PE43404 exhibits very low insertion

loss and low power consumption. This functionality is delivered

in a 4x4 mm QFN footprint.

The PE43404 is manufactured on Peregrine’s UltraCMOS™

process, a patented variation of silicon-on-insulator (SOI)

technology on a sapphire substrate, offering the performance

of GaAs with the economy and integration of conventional

CMOS.

Figure 1. Functional Schematic Diagram

Table 1. Electrical Specifications @ +25°C, V

Notes: 1. Device Linearity will begin to degrade below 1MHz

Document No. 70-0258-02 │ www.psemi.com

Operation Frequency

Insertion Loss

Attenuation Accuracy

1 dB Compression

Input IP3

Return Loss

Switching Speed

Parallel Control

Serial Control

2. Max input rating in Table 3 & Figures on Pages 4 to 6 for data across frequency.

3. Note Absolute Maximum in Table 3.

4. Measured in a 50 Ω system.

RF Input

Parameter

1,2,4

3,4

Control Logic Interface

Zo = 75 ohms

Two-tone inputs up to

Test Conditions

Switched Attenuator Array

Any Bit or Bit

Combination

50% control

+18 dBm

1 MHz ≤ 1.2 GHz

DC ≤ 1.2 GHz

Frequency

RF Output

= 3.0 V

Minimum

Features

75 Ω RF Digital Attenuator

4-bit, 15 dB, DC – 2.0 GHz

•

Figure 2. Package Type

20 Lead 4x4 mm QFN

Typical

Product Specification

PE43404

Attenuation: 1.0 dB steps to 15 dB

Flexible parallel and serial programming

interfaces

High attenuation accuracy and linearity

over temperature and frequency

Unique power-up state selection

Very low power consumption

Single-supply operation

Positive CMOS control logic

75 Ω impedance

Packaged in a 20 Lead 4x4 mm QFN

1.4

•

Parallel latched or direct mode

±(0.25+ 7% of atten setting)

Maximum

2000

1.95

Page 1 of 11

Units

MHz

dBm

µs

Related parts for EK43404-01

EK43404-01 Summary of contents

Page 1

... RF Output = 3 Frequency Minimum Typical DC DC ≤ 1.2 GHz - 1.4 DC ≤ 1.2 GHz - - 1 MHz ≤ 1.2 GHz MHz ≤ 1.2 GHz - 52 DC ≤ 1.2 GHz ©2008 Peregrine Semiconductor Corp. All rights reserved. Maximum Units 2000 MHz 1.95 dB ±(0.25 atten setting dBm - dBm - dB µs 1 Page ...

Page 2

... See “Resistor on 3” paragraph Exposed Solder Pad Connection The exposed solder pad on the bottom of the package must be grounded for proper device operation. ©2008 Peregrine Semiconductor Corp. All rights reserved. Page Table 3. Absolute Maximum Ratings Symbol V C8 ...

Page 3

... CLK 4 CLK J19 15 C8 Z=75 Ohm SMA R24 0 OHM 14 1 RFOUT MLPQ4X4 12 -VDD or GND VNEG GND 11 C14 C12 100pF 0.1µF VDD C10 C9 100pF 0.1µF ©2008 Peregrine Semiconductor Corp. All rights reserved. J20 SUPPLY VDD Page ...

Page 4

... Attenuation Steps (Zo=75 ohms -10 -15 -20 8dB -25 15dB -30 0 500 1000 RF Frequency (MHz) ©2008 Peregrine Semiconductor Corp. All rights reserved. Page 3 Figure 7. Attenuation at Major steps -40C 25C 85C 1500 2000 Figure 9. Output Return Loss at Major 4dB 1500 2000 Product Specification ...

Page 5

... Figure 11. Attenuation Error Vs. Attenuation 1 0.5 8dB 0 15dB -0.5 -1 1500 2000 Figure 13. Input 1 dB Compression (Zo=50 ohms 1500 2000 ©2008 Peregrine Semiconductor Corp. All rights reserved. Setting Attenuation Setting (dB) 0 500 1000 1500 RF Frequency (MHz) 10Mhz 250Mhz 500Mhz 750Mhz 1010Mhz 1210Mhz 14 ...

Page 6

... Attenuation Setting (dB) Note: Positive attenuation error indicates higher attenuation than target value ©2008 Peregrine Semiconductor Corp. All rights reserved. Page 3 Figure 15. Attenuation Error Vs. Attenuation 10MHz, 85C Figure 17. Attenuation Error Vs. Attenuation 0.4 0.3 0.2 1000MHz, -40C 0.1 1000MHz, 25C -0 ...

Page 7

... Table 6. Power-Up Truth Table, Parallel 15 dB Interface Mode P Note: LE PUP2 Attenuation State 0 Reference Loss Defined by C1-C8 X Power up with LE=1 provides normal parallel operation with C1-C8, and PUP2 is not active. ©2008 Peregrine Semiconductor Corp. All rights reserved. Page ...

Page 8

... Note verified during the functional pattern test. Serial Clk programming sections of the functional pattern are clocked at 10 MHz to verify fclk specification. ©2008 Peregrine Semiconductor Corp. All rights reserved. Page Table 7. 4-Bit Attenuator Serial Programming Register Map B5 0 ↑ ...

Page 9

... Coplanarity applies to the exposed heat sink slug as well as the terminals. 3. Dimensions are in millimeters. Document No. 70-0258-02 │ www.psemi.com 4.00 2.00 INDEX AREA - B - 2.00 X 2.00 0.25 C 0.10 C 0.08 C 2.00 1. DETAIL A 0. SEATING - C - PLANE EXPOSED PAD 2 0. ©2008 Peregrine Semiconductor Corp. All rights reserved. Page ...

Page 10

... Figure 21. Marking Specifications Figure 22. Tape and Reel Drawing Table 10. Ordering Information Order Code Part Marking PE43404MLI 43404 PE43404MLI-Z 43404 EK43404-01 PE43404-EK ©2008 Peregrine Semiconductor Corp. All rights reserved. Page 43404 YYWW ZZZZZ YYWW = Date Code ZZZZZ = Last five digits of PSC Lot Number ...

Page 11

... Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS and HaRP are trademarks of Peregrine Semiconductor Corp. ©2008 Peregrine Semiconductor Corp. All rights reserved. Page ...

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