AD8517 Analog Devices, AD8517 Datasheet - Page 10
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AD8517
Manufacturer Part Number
AD8517
Description
Low Voltage, High Slew Rate, Low Noise, 7 MHZ Rail-to-rail op Amp, Single
Manufacturer
Analog Devices
Datasheet
1.AD8517.pdf
(12 pages)
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AD8517/AD8527
DRIVING CAPACITIVE LOAD
Gain vs. Capacitive Load
Most amplifiers have difficulty driving capacitance due to degradation
of phase caused by additional phase lag from the capacitive load.
Higher capacitance at the output can increase the amount of over-
shoot and ringing in the amplifier’s step response and could even
affect the stability of the device. The value of capacitance load an
amplifier can drive before oscillation varies with gain, supply volt-
age, input signal, temperature, and frequency, among others. Unity
gain is the most challenging configuration for driving capacitance
load. However, the AD8517 offers good capacitance driving ability.
Table II shows the AD8517’s ability to capacitance load at differ-
ent gains before instability occurs. This table is good for all V
Gain
1
2
2.5
3
In-the-Loop Compensation Technique for Driving
Capacitive Loads
When driving capacitive loads in unity configuration, the in-the-
loop compensation technique is recommended to avoid oscillation
as is illustrated in Figure 22.
Snubber Network Compensation for Driving Capacitive Loads
As load capacitance increases, the overshoot and settling time
will increase and the unity gain bandwidth of the device will
decrease. Figure 23 shows an example of the AD8517 config-
ured for unity gain and driving a 10 kΩ resistor and a 680 pF
capacitor placed in parallel, with a square wave input set to a
frequency of 250 kHz and unity gain.
R
V
IN
X
=
Table II. Gain and Capacitance Load
R
O
R
R
R
F
F
G
400 pF
1.5 nF
8 nF
Unconditionally Stable
Max Capacitance
C
WHERE R
F
=
AD8517
1 +
O
R
C
= OPEN-LOOP OUTPUT RESISTANCE
A
G
F
1
CL
R
F
R
R
+ R
X
F
G
C
L
C
R
L
O
V
OUT
SY
.
By connecting a series R–C from the output of the device to
ground, known as the “snubber” network, this ringing and over-
shoot can be significantly reduced. Figure 24 shows the network
setup, and Figure 25 shows the improvement of the output
response with the “snubber” network added.
The network operates in parallel with the load capacitor, C
and provides compensation for the added phase lag. The actual
values of the network resistor and capacitor have to be empiri-
cally determined. Table III shows some values of snubber network
for large capacitance load.
F = 250kHz
A V = +1
C = 680pF
V
F = 250kHz
A V = +1
C = 680pF
IN
AD8517
5V
TIME – 1 s/Div
TIME – 1 s/Div
R
C
X
X
C
L
V
OUT
L
,