AN201 Vishay Intertechnology, AN201 Datasheet - Page 3

• Manufacturer Part Number: AN201
• Description: High-performance Multiplexing With The DG408
• Manufacturer: Vishay Intertechnology

High-frequency signals above a couple of MHz can limit
system accuracy, whether its specific channel is on or off.
When the device is turned on, the signal is filtered to some
degree by the distributed resistance and capacitance of the
signal path through the multiplexer. When the device is turned
off, the high frequency couples with adjacent channels through
the “off” channel to the output, thereby adding to the system
error.
What Makes the DG408/409 a Good Multiplexer?
Choosing a technology for a multiplexer can depend on many
factors, including the environment, its ruggedness, the
accuracy required, and the cost. The choice is often a
compromise between these factors. The DG408/409 is
fabricated with high-voltage CMOS technology developed
specifically by Vishay Siliconix to enhance the analog
switch/multiplexer range. The processing steps include a
Document Number: 70600
05-Aug -99
Control
FIGURE 3. CMOS Switch Showing Inherent Diodes
S
S
S
S
1A
4A
1B
4B
Address
DG409
FIGURE 4. Differential Multiplexer
–V
–V
+V
+V
D
S
buried layer which prevents the formation of the inherent SCR
found in CMOS structures. This immunity to latch-up makes
the DG408/409 particularly insensitive to transient conditions
which could occur in a remote multiplexer environment.
Figure
parasitic components. Under specific conditions (inputs
exceeding the supplies), one or more of the pn junctions
becomes forward biased and, under normal conditions, would
result in the pnpn structure turning on. This would appear as
a short circuit across the supply and would persist until the
power was removed or the device burned up.
Using the “buried layer”, the gain of the pnpn structure has
been reduced to less than unity. This effect makes device
latch-up virtually impossible.
Accuracy
Errors introduced by a multiplexer can be split into dc and ac
components. Steady-state errors in a multiplexer are due to
the on-resistance and finite leakage of the switch. Two sources
of dc error can be quantified by
input offset = R
where
R
I
r
I
S
D(on)
DS(on)
S
= source leakage
= source resistance
= drain on-state leakage.
= on-resistance
5 shows a typical profile, including the inherent
100 kW
100 kW
S
I
100 kW
S(off)
–
+
LM101D
100 kW
+V
–V
Vishay Siliconix
Difference
Signal
AN201
Out
www.vishay.com
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