ADSP-2171 Analog Devices, ADSP-2171 Datasheet - Page 13

• Manufacturer Part Number: ADSP-2171
• Description: ADSP-2100 Family DSP Microcomputers
• Manufacturer: Analog Devices

REV. A
Internal Serial Clock Generation ISCLK
Transmit Frame Sync Required TFSR
ITFS Internal Transmit Frame Sync Enable
Receive Frame Sync Required RFSR
MAC Biased Rounding Control Bit
Transmit Frame Sync Width TFSW
Receive Frame Sync Width RFSW
Transmit Autobuffer M Register
Transmit Autobuffer I Register
CLKOUT Disable Control Bit
Flag Out (Read Only)
CLKODIS
BIASRND
TMREG
TIREG
15 14 13 12 11 10
15 14 13 12 11 10
15 14 13 12 11 10
0
0
15 14 13 12 11 10
0
0
Receive Frame Sync Divide Modulus
SPORT0 Autobuffer Control Register
0
0
Serial Clock Divide Modulus
0
SPORT0 SCLKDIV
SPORT0 RFSDIV
0
Control Registers
SPORT1 Control Register
9
9
9
0
0x3FF4
0x3FF3
0x3FF5
–13–
8
8
8
0
9
7
7
7
0x3FF2
8
0
ADSP-2171/ADSP-2172/ADSP-2173
6
6
6
0
7
5
5
5
6
0
4
4
4
0
5
3
3
3
4
0
DTYPE Data Format
00 = right justify, zero-fill unused MSBs
01 = right justify, sign extend into unused MSBs
10 = compand using -law
11 = compand using A-law
INVRFS Invert Receive Frame Sync
INVTFS Invert Transmit Frame Sync
IRFS Internal Receive Frame Sync Enable
2
2
2
0
3
1
1
0
1
2
0
0
0
0
0
1
0
RBUF
Receive Autobuffering Enable
TBUF
Transmit Autobuffering Enable
RMREG
Receive Autobuffer M Register
RIREG
Receive Autobuffer I Register
SLEN Serial Word Length
0
0