ADS824 Burr-Brown Corporation, ADS824 Datasheet - Page 8

• Manufacturer Part Number: ADS824
• Description: 10-Bit/ 70MHz Sampling ANALOG-TO-DIGITAL CONVERTER
• Manufacturer: Burr-Brown Corporation

APPLICATION INFORMATION
THEORY OF OPERATION
The ADS824 is a high-speed, CMOS analog-to-digital con-
verter which employs a pipelined converter architecture
consisting of 9 internal stages. Each stage feeds its data into
the digital error correction logic ensuring excellent differen-
tial linearity and no missing codes at the 10-bit level. The
output data becomes valid on the rising clock edge (see
Timing Diagram). The pipeline architecture results in a data
latency of 5 clock cycles.
The analog input of the ADS824 is a differential track and
hold (see Figure 1). The differential topology along with
tightly matched capacitors produce a high level of ac-
performance while sampling at very high rates.
The ADS824 allows its analog inputs to be driven either
single-ended or differentially. The typical configuration for
the ADS824 is for the single-ended mode in which the input
track-and-hold performs a single-ended-to-differential con-
version of the analog input signal.
Both inputs (IN, IN) require external biasing using a com-
mon-mode voltage that is typically at the mid-supply level
(+V
The following application discussion focuses on the single-
ended configuration. Typically, its implementation is easier
to achieve and the rated specifications for the ADS824 are
characterized using the single-ended mode of operation.
DRIVING THE ANALOG INPUT
The ADS824 achieves excellent ac performance either in the
single-ended or differential mode of operation. The selection
for
FIGURE 1. Simplified Circuit of Input Track-and-Hold with
S
/2).
Internal Non-overlapping Clock
the
IN
IN
Input Clock (50%)
1
Timing Diagram.
optimum
®
1
1
2
ADS824
2
1
interface
C
C
I
I
Op Amp
Op Amp
Bias
1
1
1
Bias
C
C
H
H
configuration
1
1
V
V
CM
CM
2
2
OUT
OUT
will
8
depend on the individual application requirements and sys-
tem structure. For example, communications applications
often process a band of frequencies that do not include DC,
whereas in imaging applications, the previously restored DC
level must be maintained correctly up to the A/D converter.
Features on the ADS824 such as the input range select
(RSEL pin) or the option for an external reference, provide
the needed flexibility to accommodate a wide range of
applications. In any case, the ADS824 should be configured
such that the application objectives are met while observing
the headroom requirements of the driving amplifier in order
to yield the best overall performance.
INPUT CONFIGURATIONS
AC-Coupled, Single-Supply Interface
Figure 2 shows the typical circuit for an ac-coupled analog
input configuration of the ADS824 while all components are
powered from a single +5V supply.
With the RSEL pin connected high, the full-scale input
range is set to 2Vp-p. In this configuration, the top and
bottom references (REFT, REFB) provide an output voltage
of +3.5V and +1.5V, respectively. Two resistors ( 2x 1.0k )
are used to create a common-mode voltage (V
proximately +2.5V to bias the inputs of the driving amplifier
A1. Using the OPA680 on a single +5V supply, its ideal
common-mode point is at +2.5V, which coincides with the
recommended common-mode input level for the ADS824.
This obviates the need of a coupling capacitor between the
amplifier and the converter. Even though the OPA680 has an
ac gain of +2, the dc gain is only +1 due to the blocking
capacitor at resistor R
The addition of a small series resistor (R
output of the op amp and the input of the ADS824 will be
beneficial in almost all interface configurations. This will
decouple the op amp’s output from the capacitive load and
avoid gain peaking, which can result in increased noise. For
best spurious and distortion performance, the resistor value
should be kept below 100 . Furthermore, the series resistor,
in combination with the 10pF capacitor, establishes a pas-
sive low-pass filter, limiting the bandwidth for the wideband
noise thus, help improving the SNR performance.
AC-Coupled, Dual Supply Interface
The circuit provided in Figure 3 shows typical connections
for the analog input in case the selected amplifier operates
on dual supplies. This might be necessary to take full
advantage of very low distortion operational amplifiers, like
the OPA642. The advantage is that the driving amplifier can
be operated with a ground referenced bipolar signal swing.
This will keep the distortion performance at its lowest since
the signal range stays within the linear region of the op amp
and sufficient headroom to the supply rails can be main-
tained. By capacitively coupling the single-ended signal to
the input of the ADS824, its common-mode requirements
can easily be satisfied with two resistors connected between
the top and bottom reference.
G
.
S
) between the
CM
) of ap-