WF2M32 White Electronic Designs Corporation, WF2M32 Datasheet
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WF2M32
Manufacturer Part Number
WF2M32
Description
Organization = 2Mx32 ;; Speed (ns) = 90-150 ;; Volt = 5 ;; Package = 68 CQFP ;; Temp = C,i,m ;;
Manufacturer
White Electronic Designs Corporation
Datasheet
1.WF2M32.pdf
(14 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
WF2M32-100G4TM
Manufacturer:
INT
Quantity:
2
Company:
Part Number:
WF2M32-100H2M
Manufacturer:
W
Quantity:
6
Company:
Part Number:
WF2M32-120G2UM5A
Manufacturer:
HARVATEK
Quantity:
24 000
Company:
Part Number:
WF2M32-90HM5
Manufacturer:
SANYO
Quantity:
72
2Mx32 5V FLASH MODULE, SMD 5962-97531 (pending)
FEATURES
October 1999 Rev.3
FIG. 1
Access Time of 90, 120, 150ns
• 66 pin, PGA Type, 1.185" square, Hermetic Ceramic HIP
• 68 lead, Hermetic CQFP (G2U), 22.4mm (0.880") square
Sector Architecture
• 32 equal size sectors of 64KBytes per each 2Mx8 chip
• Any combination of sectors can be erased. Also supports
Minimum 100,000 Write/Erase Cycles Minimum
Organized as 2Mx32
Packaging:
(Package 401).
(Package 510) 3.56mm (0.140") height. Designed to fit
JEDEC 68 lead 0.990" CQFJ footprint (Fig. 3)
full chip erase.
11
1
I/O
I/O
I/O
A
A
A
A
A
I/O
I/O
I/O
14
16
11
0
18
8
9
10
0
1
2
PIN CONFIGURATION FOR WF2M32-XHX5
12
22
WE
CS
GND
I/O
A
A
A
V
CS
A
I/O
10
9
15
CC
19
11
3
2
1
2
23
33
I/O
I/O
I/O
I/O
OE
A
WE
I/O
I/O
I/O
I/O
17
TOP VIEW
15
14
13
12
7
6
5
4
1
I/O
I/O
I/O
I/O
I/O
I/O
A
A
A
A
A
24
25
26
12
20
13
16
17
18
7
8
44
34
I/O
I/O
GND
WE
WE
V
CS
CS
CC
A
A
A
27
19
4
4
4
5
6
3
3
45
55
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
A
A
A
31
30
29
28
23
22
21
20
1
2
3
56
66
A
0
1
O E
-
2 0
RESET internally tied to Vcc in the HIP package for this pin configuration. See
Alternate Pin Configuration with RESET tied to pin 12 for system control of
reset (Fig. 10, page 11)
*
Commercial, Industrial, and Military Temperature Ranges
5 Volt Read and Write. 5V 10% Supply.
Low Power CMOS
Data Polling and Toggle Bit feature for detection of program
or erase cycle completion.
Supports reading or programming data to a sector not being
erased.
RESET pin resets internal state machine to the read mode.
Built in Decoupling Caps and Multiple Ground Pins for Low
Noise Operation, Separate Power and Ground Planes to
improve noise immunity
This data sheet describes a product under development, not fully
characterized, and is subject to change without notice.
Note: For programming information refer to Flash Programming 16M5
2M x 8
I / O
W E CS
8
0 - 7
1
Application Note.
1
BLOCK DIAGRAM
White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520
I / O
2M x 8
W E CS
8
8 - 1 5
2
2
I / O
2M x 8
W E CS
8
1 6 - 2 3
HI-RELIABILITY PRODUCT
PRELIMINARY*
3
I/O
PIN DESCRIPTION
WE
CS
A
GND
V
OE
0-20
CC
0-31
3
1-4
WF2M32-XXX5
1-4
Data Inputs/Outputs
I / O
2M x 8
Address Inputs
Write Enables
Output Enable
Power Supply
W E CS
8
Chip Selects
2 4 - 3 1
4
Ground
4