MAXQ615 Maxim Integrated Products, MAXQ615 Datasheet - Page 11

• Manufacturer Part Number: MAXQ615
• Description: 16-Bit MAXQ Microcontroller
• Manufacturer: Maxim Integrated Products

The password can be entered through the bootloader
interface selected by the PSS1 and PSS0 bits in sys-
tem programming when the SPE bit is set to logic 1, or
selected through the TAP interface directly by issuing a
password-unlock command.
The utility ROM is a block of internal ROM that defaults to
a starting address of 8000h. The utility ROM consists of
subroutines that can be called from application software.
These include the following:
• In-system programming using bootstrap loader
• Read chip revision or manufacturer ID
• Test routines (internal memory tests, memory loader,
• User-callable routines for in-application flash pro-
Following any reset, execution begins in the utility ROM.
The ROM software determines whether the program
execution should immediately jump to location 0000h,
the start of system code, or to one of the special routines
mentioned. Routines within the utility ROM are user-
accessible and can be called as subroutines by the
application software. More information on the utility ROM
functions is contained in the user manual.
An internal bootstrap loader allows the device to be
reloaded over the JTAG interface. This allows software to
be upgraded in-system, eliminating the need for a costly
Table 1. Watchdog Timer Intervals (f
WD[1:0]
etc.)
gramming and fast table lookup
00
01
10
11
Loading Flash Memory with the
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WATCHDOG INTERRUPT
Sysclk x 2
Sysclk x 2
Sysclk x 2
Sysclk x 2
TIMEOUT
15
16
17
18
Bootstrap Loader
16-Bit MAXQ Microcontroller with
Utility ROM
SYSCLK
WATCHDOG INTERRUPT
= 20MHz, CD[1:0] = 00)
PERIOD (ms)
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hardware retrofit when updates are required. Remote
software uploads are possible that enable physically
inaccessible applications to be frequently updated. If
in-system programmability is not required, a commercial
gang programmer can be used for mass programming.
An internal watchdog timer greatly increases system reli-
ability. The timer resets the device if software execution
is disturbed. The watchdog timer is a free-running coun-
ter designed to be periodically reset by the application
software. If software is operating correctly, the counter is
periodically reset and never reaches its maximum count.
However, if software operation is interrupted, the timer
does not reset, triggering a system reset and option-
ally a watchdog timer interrupt. This protects the system
against electrical noise or electrostatic discharge (ESD)
upsets that could cause uncontrolled processor opera-
tion. The internal watchdog timer is an upgrade to older
designs with external watchdog devices, reducing sys-
tem cost and simultaneously increasing reliability.
The watchdog timer functions as the source of both the
watchdog timer timeout and the watchdog timer reset.
The timeout period can be programmed in a range of
215 to 232 system clock cycles. An interrupt is gener-
ated when the timeout period expires if the interrupt
is enabled. All watchdog timer resets follow the pro-
grammed interrupt timeouts by 512 system clock cycles.
If the watchdog timer is not restarted for another full
interval in this time period, a system reset occurs when
the reset timeout expires.
1.62
3.27
6.55
13.1
Hardware Multiplier
WATCHDOG INTERRUPT (µs)
WATCHDOG RESET AFTER
Watchdog Timer
MAXQ615
25.6
25.6
25.6
25.6
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