MAX9526 Maxim Integrated Products, MAX9526 Datasheet - Page 29

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MAX9526

Manufacturer Part Number
MAX9526
Description
High-Performance NTSC/PAL Video Decoder
Manufacturer
Maxim Integrated Products
Datasheet

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1 = D9–D0 are the ADC outputs directly without being
0 = D9–D0 are 10-bit YCbCr component video
With RAWADC = 1, the D9–D0 output data rate is
54Msps and the LLC clock output is 54MHz. Figure 16
shows the typical setup and hold timings of the output
signals with RAWADC = 1.
LLC can optionally be inverted by setting LLCINV = 1 in
register 0x0D, B5.
With RAWADC = 1 the ADC outputs are filtered with the
digital lowpass filter before being routed to D9–D0. The
ADC outputs can be directly connected to D9–D0 with-
out filtering by setting RAWADC = 1 and DISAAFLT = 1
in register 0x0F, B5.
Color Test Signal Register
Figure 16. Typical Setup and Hold Timings in RAWADC Mode
(54MHz)
D9–D0
LLC
0x0C
processed by video demodulator.
(default).
REG
~8ns
~18.5ns
RAWADC
______________________________________________________________________________________
B7
ADC-Only Mode (RAWADC)
~8ns
B6
0
TGEnab
Low-Power, High-Performance
B5
NTSC/PAL Video Decoder
TGTIM
B4
TGSRC
B3
B2
0
B1
CBAR
B0
29

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