MAX8833 Maxim Integrated Products, MAX8833 Datasheet - Page 16

• Manufacturer Part Number: MAX8833
• Description: 2MHz Step-Down Regulator
• Manufacturer: Maxim Integrated Products

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Set the second compensation pole at 1/2 the switching
frequency. Calculate C10 as follows:
The recommended range for R4 is 2kΩ to 10kΩ. Note
that the loop compensation remains unchanged if only
R6’s resistance is altered to set different outputs.
Careful PCB layout is critical to achieve low switching
losses and clean, stable operation. The switching
power stage requires particular attention. It is highly
recommended to duplicate the MAX8833 layout for
optimum performance. If deviation is necessary, follow
these guidelines for a good PCB layout:
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Dual, 3A, 2MHz Step-Down Regulator
16
A multilayer PCB is recommended. Use inner-layer
ground (and power) planes to minimize noise cou-
pling.
Place the input ceramic decoupling capacitor
directly across and as close as possible to IN_ and
PGND_. This is to help contain the high switching
currents within a small loop.
Connect IN_ and PGND_ separately to large cop-
per areas to help cool the IC and further improve
efficiency and long-term reliability.
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Applications Information
C
10
=
π
PCB Layout Guidelines
×
R
1
7
×
f
S
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Connect input, output, and VDL capacitors to the
power ground plane (PGND_).
Keep the path of switching currents short and mini-
mize the loop area formed by LX_, the output
capacitor(s), and the input capacitor(s).
Place the IC decoupling capacitors as close as
possible to the IC pins, connecting all other ground-
terminated capacitors, resistors, and passive com-
ponents to the reference or analog ground plane
(AGND).
Separate the power and analog ground planes,
using a single-point common connection point (typi-
cally, at the C
Connect the exposed pad to the analog ground
plane, allowing sufficient copper area to help cool
the device. If the exposed pad is used as a com-
mon PGND_-to-AGND connection point, avoid run-
ning high current through the exposed pad by
using separate vias to connect the PGND_ pins to
the power ground plane rather than connecting
them to the exposed pad on the top layer.
Use caution when routing feedback and compensa-
tion node traces; avoid routing near high dV/dt
nodes (LX_) and high-current paths. Place the feed-
back and compensation components as close as
possible to the IC pins.
Reference the MAX8833 Evaluation Kit for an exam-
ple layout.
IN
cathode.