MAX8794 Maxim Integrated Products, MAX8794 Datasheet
MAX8794
Manufacturer Part Number
MAX8794
Description
Low-Voltage DDR Linear Regulator
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX8794.pdf
(13 pages)
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The MAX8794 DDR linear regulator sources and sinks up
to 3A peak (typ) using internal n-channel MOSFETs. This
linear regulator delivers an accurate 0.5V to 1.5V output
from a low-voltage power input (V
MAX8794 uses a separate 3.3V bias supply to power the
control circuitry and drive the internal n-channel MOSFETs.
The MAX8794 provides current and thermal limits to pre-
vent damage to the linear regulator. Additionally, the
MAX8794 generates a power-good (PGOOD) signal to
indicate that the output is in regulation. During startup,
PGOOD remains low until the output is in regulation for 2ms
(typ). The internal soft-start limits the input surge current.
The MAX8794 powers the active-DDR termination bus
that requires a tracking input reference. The MAX8794
can also be used in low-power chipsets and graphics
processor cores that require dynamically adjustable
output voltages. The MAX8794 is available in a 10-pin,
3mm x 3mm, TDFN package.
19-0584; Rev 0; 8/06
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
TOP VIEW
Notebook/Desktop Computers
DDR Memory Termination
Active Termination Buses
Graphics Processor Core Supplies
Chipset/RAM Supplies as Low as 0.5V
REFOUT
PGOOD
AGND
REFIN
V
CC
________________________________________________________________ Maxim Integrated Products
1
2
3
4
5
3mm x 3mm
General Description
MAX8794
TDFN
Pin Configuration
Low-Voltage DDR Linear Regulator
IN
Applications
= 1.1V to 3.6V). The
10
9
8
7
6
IN
OUT
PGND
SHDN
OUTS
♦ Internal Power MOSFETs with Current Limit (3A typ)
♦ Fast Load-Transient Response
♦ External Reference Input with Reference
♦ 1.1V to 3.6V Power Input
♦ ±15mV (max) Load-Regulation Error
♦ Thermal-Fault Protection
♦ Shutdown Input
♦ Power-Good Window Comparator with 2ms (typ)
♦ Small, Low-Profile, 10-Pin, 3mm x 3mm TDFN
♦ Ceramic or Polymer Output Capacitors
+Denotes lead-free package.
MAX8794ETB+
Output Buffer
Delay
Package
(2.7V TO 3.6V)
(2.5V OR 1.8V)
PART
V
V
BIAS
DDQ
(1.1V TO 3.6V)
V
IN
RANGE
-40°C to
Typical Operating Circuit
+85°C
TEMP
Ordering Information
IN
V
SHDN
PGOOD
REFIN
CC
PIN-
PACKAGE
10 TDFN
(3mm x 3mm)
MAX8794
REFOUT
PGND
AGND
OUTS
OUT
MARK
TOP
ABD
Features
V
REFOUT
V
= V
OUT
T1033-1
CODE
PKG
TTR
= V
TT
1
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