MAX8792 Maxim Integrated Products, MAX8792 Datasheet - Page 19

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MAX8792

Manufacturer Part Number
MAX8792
Description
Single Quick-PWM Step-Down Controller
Manufacturer
Maxim Integrated Products
Datasheet

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Adaptive dead-time circuits monitor the DL and DH dri-
vers and prevent either FET from turning on until the
other is fully off. The adaptive driver dead time allows
operation without shoot-through with a wide range of
MOSFETs, minimizing delays and maintaining efficiency.
There must be a low-resistance, low-inductance path
from the DL and DH drivers to the MOSFET gates for
the adaptive dead-time circuits to work properly; other-
wise, the sense circuitry in the MAX8792 interprets the
MOSFET gates as “off” while charge actually remains.
Use very short, wide traces (50 mils to 100 mils wide if
the MOSFET is 1in from the driver).
The internal pulldown transistor that drives DL low is
robust, with a 0.9Ω (typ) on-resistance. This helps pre-
vent DL from being pulled up due to capacitive coupling
from the drain to the gate of the low-side MOSFETs
when the inductor node (LX) quickly switches from
ground to V
long inductive driver traces may require rising LX edges
do not pull up the low-side MOSFETs’ gate, causing
shoot-through currents. The capacitive coupling
between LX and DL created by the MOSFET’s gate-to-
drain capacitance (C
(C
not exceed the following minimum threshold:
Typically, adding a 4700pF between DL and power
ground (C
MOSFETs, greatly reduces coupling. Do not exceed
22nF of total gate capacitance to prevent excessive
turn-off delays.
Alternatively, shoot-through currents can be caused by
a combination of fast high-side MOSFETs and slow low-
side MOSFETs. If the turn-off delay time of the low-side
MOSFET is too long, the high-side MOSFETs can turn
on before the low-side MOSFETs have actually turned
off. Adding a resistor less than 5Ω in series with BST
slows down the high-side MOSFET turn-on time, elimi-
nating the shoot-through currents without degrading
the turn-off time (R
high-side MOSFET also reduces the LX node rise time,
thereby reducing EMI and high-frequency coupling
responsible for switching noise.
ISS
- C
RSS
IN
NL
), and additional board parasitics should
. Applications with high-input voltages and
in Figure 6), close to the low-side
V
______________________________________________________________________________________
GS TH
BST
(
RSS
in Figure 6). Slowing down the
)
), gate-to-source capacitance
>
V
IN
C
C
RSS
ISS
Controller with Dynamic REFIN
Single Quick-PWM Step-Down
Firmly establish the input voltage range and maximum
load current before choosing a switching frequency and
inductor operating point (ripple-current ratio). The prima-
ry design trade-off lies in choosing a good switching fre-
quency and inductor operating point, and the following
four factors dictate the rest of the design:
Figure 6. Gate Drive Circuit
Input voltage range: The maximum value
(V
supply voltage allowed by the notebook’s AC
adapter voltage. The minimum value (V
must account for the lowest input voltage after
drops due to connectors, fuses, and battery selec-
tor switches. If there is a choice at all, lower input
voltages result in better efficiency.
Maximum load current: There are two values to
consider. The peak load current (I
determines the instantaneous component stresses
and filtering requirements, and thus drives output
IN(MAX)
(R
THE SWITCHING NODE RISE TIME.
(C
COUPLING THAT CAN CAUSE SHOOT-THROUGH CURRENTS.
Quick-PWM Design Procedure
BST
NL
)* OPTIONAL—THE CAPACITOR REDUCES LX TO DL CAPACITIVE
)* OPTIONAL—THE RESISTOR LOWERS EMI BY DECREASING
) must accommodate the worst-case input
PGND
BST
V
DH
LX
DD
DL
C
BYP
(R
(C
BST
C
NL
BST
)*
)*
N
N
H
L
INPUT (V
LOAD(MAX)
L
IN(MIN)
IN
)
19
)
)

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