MAX8729 Maxim Integrated Products, MAX8729 Datasheet - Page 10

• Manufacturer Part Number: MAX8729
• Description: Constant-Frequency / Half-Bridge CCFL Inverter Controller
• Manufacturer: Maxim Integrated Products

Constant-Frequency, Half-Bridge CCFL
Inverter Controller
10
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PIN
10
11
12
13
14
15
16
17
1
2
3
4
5
6
7
8
9
PCOMP
HSYNC
DPWM
NAME
COMP
SHDN
CNTL
PSCK
HFCK
LFCK
GND
TFLT
V
SEL
PS2
HF
LF
IN
CC
Compensation Node of the Phase-Lock Loop. Connect a 0.1µF capacitor between PCOMP and GND
to compensate the phase-lock loop.
Brightness-Control Select Input. Brightness can be adjusted with an analog voltage or with an
external sync signal. Connecting SEL to GND enables analog control at the CNTL pin. Connecting
SEL to V
Supply Input. Input to the internal 5.35V linear regulator that powers the device. Bypass IN to GND
with a 0.1µF ceramic capacitor.
5.35V/10mA Linear-Regulator Output. V
Bypass V
System Ground
Fault-Timer Set Pin. Connect a 0.22µF capacitor from TFLT to GND to set the open-lamp fault delay
period to approximately 1.2s and the secondary short-circuit fault-delay period to approximately
10ms. See the Setting the Fault-Delay Time section for details.
Brightness Control Input. The usable brightness control range is from 0 to 2V. V
the minimum brightness (10% DPWM duty cycle); 2V ≤ V
(100% DPWM duty cycle). The MAX8729 enters into slave mode when CNTL is connected to V
See the Digital PWM Dimming Control section for details.
Shutdown Control Input. The MAX8729 shuts down when SHDN is pulled to GND.
DPWM Frequency Adjustment Pin. Connect a resistor from LF to GND to set the DPWM oscillator
frequency. LF is a logic input when CNTL is connected to V
DPWM Oscillator Clock Output. LFCK is a logic input when CNTL is connected to V
DPWM Signal Output. The DPWM output is used to control the DPWM frequency of the slave IC in
master-slave operation. See the Slave Operation section for details.
Phase-Shift Clock Output. PSCK is a logic input when CNTL is connected to V
Main Switching Oscillator Clock Output. HFCK is a logic input when CNTL is connected to V
Main Switching-Frequency Sync Input. Switching frequency can be synchronized with an external
signal on HSYNC. HSYNC has a Schmitt trigger input.
Switching-Frequency Adjustment Pin. Connect a resistor from HF to GND to set the main oscillator
frequency. HF is a logic input when CNTL is connected to V
Phase-Shift Select Input. The PS1 and PS2 logic inputs select between four programmable phase
shifts (60°, 90°, 120°, and 180°) in master-slave operation. PS1 and PS2 should be in identical states
in each slave. See the Phase Shift section for details.
Transconductance Error-Amplifier Output. A 0.01µF capacitor connected between COMP and GND
sets the rise and fall time of the lamp-current envelope during DPWM operation. See the COMP
Capacitor Selection section for details.
CC
CC
enables brightness control using an external sync signal at the LSYNC pin.
to GND with a 1µF ceramic capacitor.
CC
powers most of the control circuitry in the MAX8729.
FUNCTION
CNTL
CC
CC
.
< 4.2V represents the full brightness
.
Pin Description
CC
CNTL
.
CC
= 0 represents
.
CC
CC
.
.