MAX747 Maxim, MAX747 Datasheet - Page 9

• Manufacturer Part Number: MAX747
• Description: High-Efficiency PWM / Step-Down P-Channel DC-DC Controller
• Manufacturer: Maxim

duty cycle) is 331mW. Metal film resistors are
recommended. Do not use wire-wound resistors because
their inductance will adversely affect circuit operation.
Determine the duty cycle for CCM from the following
equation:
where V
FET and sense resistor, and can be approximated as
(I
Once the sense resistor value is determined, the
inductor is determined from the following equation. The
value of inductor L ensures proper slope
compensation. Continuing with the above example,
Although 38µH is the calculated value, the component
used may have a tolerance of ±30% or more. Make
sure the inductor’s saturation current rating (the current
at which the core begins to saturate and the
inductance starts to fall) exceeds the peak current set
by R
Inductors with molypermalloy powder (MPP), Kool Mµ,
or ferrite are recommended. Inexpensive iron powder
core inductors are not suitable due to their increased
core losses. MPP and Kool Mµ cores have low
permeability, allowing larger currents.
Figure 4. Input Voltage Monitor Circuit
LOAD
Duty cycle (%)
L
SENSE
)[R
SW
(R
(50mV) (100kHz)
DS(ON)
R2
R1
(V
.
SENSE
(38m ) (5V)
RAMP(MAX)
is the voltage drop across the external P-
1
+ R
LBI
) (V
_______________________________________________________________________________________
SENSE
OUT(MAX)
MAX747
) (f
V
OSC
].
V
12
13
GND
OUT
V
V+
IN
)
38 H
V
)
LBO
SW
Inductor Selection
14
V
DIODE
TO V
R
V
High-Efficiency PWM, Step-Down
2
TH
V
= R1
DIODE
= 2.0V
OUT
R3
100k
LOW-BATTERY
OR V
(
V
V
OUTPUT
TRIP
TH
IN
-1
100%
)
P-Channel DC-DC Controller
For highest efficiency, use a coil with low DC
resistance. To minimize radiated noise, use a toroid,
pot core, or shielded coil.
To ensure the external P-FET is fully on, use logic-level,
or low threshold P-FETs when the minimum input
voltage is less than 8V.
When selecting the P-FET, three important parameters
to note are total gate charge (Q
(R
Q
associated with charging the gate. Use the typical Q
value for best results; the maximum value is usually
overspecified since it is a guaranteed limit and not the
measured value. The typical total gate charge should
be ≤ 50nC. Larger numbers mean that EXT may not be
able to adequately drive the gate. EXT sink/source
capability (I
There are two losses associated with the P-FET’s power
dissipation: I
power dissipation (PD) is approximated by:
where the duty cycle is approximated by V
100kHz, and R
sheet of the chosen P-FET. In the equation, R
assumed to be constant, but is actually a function of
temperature. Note that the equation does not account
for losses incurred by charging and discharging the
Figure 5. Adjustable Output Circuit
g
DS(ON)
, the total gate charge, includes all capacitances
*
PD
SEE COMPENSATION CAPACITOR SECTION
), and reverse transfer capacitance (C
Duty Cycle I
V +
EXT
MAX747
2
2
) is typically 140mA.
R losses and switching losses. CCM
DS(ON)
C
12
13
RSS
GND
V
V+
IN
I
EXT
PK
and C
OUT
External P-FET Selection
FB
2
I
PK
5
8
R
DS(ON)
f
OSC
N.C.
RSS
C6
are given in the data
*
R4 = 10k TO 1M
R5 = R4
+
g
), on resistance
R4
(
OUT
R5
V
2V
OUT
/V+, f
-1
)
RSS
DS(ON)
...to V
).
OSC
OUT
is
=
9
g