ADC-208A Datel, Inc., ADC-208A Datasheet - Page 2

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ADC-208A

Manufacturer Part Number
ADC-208A
Description
Sampling A/D Converters
Manufacturer
Datel, Inc.
Datasheet
ABSOLUTE MAXIMUM RATINGS
(Typical at +5V power, +25°C, 20MHz clock, +REFERENCE = +5V,
–REFERENCE = ground, unless noted)
ADC-208A
DATEL, Inc., Mansfi eld, MA 02048 (USA)
PARAMETERS
Power Supply Voltage (V
Digital Inputs
Analog Input
Reference Inputs
Digital Outputs
Lead Temperature (10 sec. max.)
Storage Temperature
FUNCTIONAL SPECIFICATIONS
ANALOG INPUT
Single-Ended, Non-Isolated
Input Range DC - 20MHz
Analog Input Capacitance
(dynamic - Pin 5 to 7)
Reference Ladder Resistance
Reference Input (Note 5)
DIGITAL INPUTS
Logic Levels
Logic Loading
Clock Low Pulse Width
DIGITAL OUTPUTS
Logic Levels
Logic Loading
Output Data Valid Delay From
Rising Clock Edge
Data Output Resolution
Data Coding
PERFORMANCE
Sampling Rate
Full Power Bandwidth
Diff. Linearity @ +25°C
(See tech note 7)
Diff. Linearity Over Temp.
Int. Linearity @ +25°C
(See tech note 4)(ref. adjusted)
Int. Linearity Over Temp.
(ref. adjusted)
Int. Linearity @ +25°C
(ref. unadjusted)
(short circuit protected to ground)
(static - Pin 5 to 7)
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0"
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0"
99% probability
100% probability
Code Transitions
Center of Codes
Code Transitions
Center of Codes
End-point
Best-fi t Line
Best-fi t Line
End-point
Best-fi t Line
+25°C
–55°C to +125°C
DD
Pin 1, 10, 19)
MIN.
–0.5
3.2
2.4
15
15
10
0
4
4
5
5
8
–0.5 to (+V
Straight binary
–0.5 to (+V
Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356
–0.5 to +5.5
–0.5 to +5.5
–65 to +150
±0.25
±0.25
–0.5 to +7
+300 max.
LIMITS
TYP.
±0.5
±0.5
±1/2
±1.6
500
4.5
20
64
+1
+1
25
10
10
20
±2
DD
DD
+0.5)
+0.5)
V
MAX.
DD
+5.0
±1.0
±1.0
±1/2
±1/2
±2.6
±1.9
0.8
5.0
0.4
+5
+5
15
25
40
±1
+0.5
UNITS
Volts
Volts
Volts
Volts
Volts
UNITS
MSPS
Ohms
Volts
Volts
Volts
Volts
nSec
Volts
Volts
nSec
nSec
nSec
MHz
°C
°C
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
Bits
mA
mA
µA
µA
pF
pF
2
TECHNICAL NOTES
1. The Reference ladder is fl oating with respect to VDD
2. Clock Pulse Width – To improve performance when input
3. A full-scale input produces all "1" on the data outputs.
4. DATEL uses the conservative defi nitions when specifying
PERFORMANCE
Int. Linearity Over Temp.
(ref. unadjusted)
Zero-Scale Offset
(Code "0" to "1" transition)
Gain Error
Differential Gain
Differential Phase
Aperture Delay
Aperture Jitter
Harmonic Distortion
(8MHz second order harm.)
Ref. bandwidth
(See tech note 5)
Power Supply Rejection
POWER REQUIREMENTS
Power Supply Range (+V
Power Supply Current
Power Dissipation
PHYSICAL ENVIRONMENTAL
Operating Temp. Range, Case:
Storage Temp. Range
Package Type
Footnotes:
End-point
Best-fi t Line
No Missing Codes
+25°C
+125°C
–55°C
+25°C
+125°C
–55°C
MC/LM Versions
MM/LM/QL Versions
DIP
LCC
and may be referenced anywhere within the specifi ed
limits. AC modulation of the reference voltage may also
be utilized; contact DATEL for further information.
signals may exceed Nyquist bandwidths, the clock duty
cycle can be adjusted so that the low portion (sample
mode) of the clock pulse is 15nSec wide. Reducing
the sampling time period minimizes the amount the
input voltage slews and prevents the comparators from
saturating.
Intergal Linearity (end-point) and Differential Linearity (code
transition). The specifi cations using the less conservative
defi nition have also been provided as a comparative
specifi cation for products specifi ed this way.
Maximum input impedance is a function of clock frequency.
At full-power input.
For 10-step, 40 IRE NTSC ramp test.
E–mail: sales@datel.com
DD
)
MIN.
Over the operating temperature range
+3.0
–40
–55
–65
0
®
24-pin ceramic LCC
24-pin ceramic DIP
±0.02
TYP.
±2.3
±1.8
±1.5
+5.0
–46
+45
+40
+50
225
200
250
1.1
±1
50
10
2
8
Internet: www.datel.com
MAX.
±0.05
+125
+150
±2.6
±2.0
+5.5
+65
+60
+70
+70
325
300
350
±2
±3
degrees
%FSR/%Vs
UNITS
Volts
LSB
LSB
MHz
LSB
LSB
mW
mW
mW
mA
mA
mA
dB
ns
ps
°C
°C
°C
%
®

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