ADC-207 Datel, Inc., ADC-207 Datasheet - Page 2

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ADC-207

Manufacturer Part Number
ADC-207
Description
20mhz, CMOS Flash ADC: 7-bit
Manufacturer
Datel, Inc.
Datasheet

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ADC-207
FUNCTIONAL SPECIFICATIONS
(Typical at +5V power, +25°C, 20MHz clock, +REFERENCE = +5V,
–REFERENCE = ground, unless noted)
ABSOLUTE MAXIMUM RATINGS
ANALOG INPUT
Input Type
Input Range (dc-20MHz)
Input Impedance
Input Capacitance (Full Range)
DIGITAL INPUTS
Logic Levels
Sample Pulse Width
Reference Ladder Resistance
PERFORMANCE
Conversion Rate
Harmonic Distortion
Differential Gain
Differential Phase
Aperture Delay
Aperture Jitter
No Missing Codes
Integral Linearity
Over Temperature Range
Differential Nonlinearity
Over Temperature Range
Power Supply Rejection
DIGITAL OUTPUTS
Data Coding
Data Output Resolution
Logic Levels
Output Data Valid Delay
POWER REQUIREMENTS
Power Supply Range (+V
Power Supply Current
Power Dissipation
Footnotes:
PARAMETERS
Power Supply Voltage (+V
Digital Inputs
Analog Input
Reference Inputs
Digital Outputs
Lead Temperature (10 sec. max.)
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0"
(During Sampling Portion of Clock)
(8MHz 2nd Order Harmonic)
LC/MC grade
LM/MM grade
Logic "1"
Logic "0" (at 1.6mA)
Logic Loading "1"
Logic Loading "0"
(From Rising Edge)
(short circuit protected to ground)
At full power input and chip selects enabled.
At 4MHz input and 20MHz clock.
For 10-step, 40 IRE NTSC ramp test.
Adjustable using reference ladder midpoint tap. See ADC-207 Operation.
DD
DD
)
)
MIN.
+3.2
+2.4
+3.0
225
–55
12
20
–4
+4
0
0
7
Single-ended, non-isolated
Straight binary
–0.5 to (+V
TYP.
±0.02
1000
±0.8
±0.3
±0.4
+4.5
+5.0
330
–40
+50
250
1.5
10
±1
±1
25
50
±1
15
3
8
–0.5 to +V
–0.5 to +5.5
–0.5 to +5.5
–0.5 to +7
LIMITS
+300
DD
MAX.
+125
+0.8
±0.5
±0.6
+0.4
+5.5
+70
+70
385
DD
+5
±5
±5
±1
17
+0.5)
microamps
microamps
%FSR/%Vs
UNITS
degrees
UNITS
Ohms
Ohms
Volts
Volts
Volts
Volts
Volts
Volts
MHz
LSB
LSB
LSB
LSB
mW
Bits
mA
mA
mA
Volts
Volts
Volts
Volts
Volts
pF
dB
ns
ns
ps
°C
°C
ns
%
°C
2
PHYSICAL/ENVIRONMENTAL
TECHNICAL NOTES
1. Input Buffer Amplifier – Since the ADC-207 has a switched
2. Reference Ladder – Adjusting the voltage at +REFERENCE
3. Clock Pulse Width – To improve performance at Nyquist
4. At sampling rates less than 100kHz, there may be some
Since the ADC-207 is a CMOS device, normal precautions
against static electricity should be taken. Use ground straps,
grounded mats, etc. The Absolute Maximum Ratings of the
device MUST NOT BE EXCEEDED as irrevocable damage to
the ADC-207 will occur.
PARAMETERS
Operating Temp. Range, Case:
Storage Temp. Range
Package Type
LC/MC Versions
MM/LM/QL Versions
DIP
LCC
0.1µF
0.1µF
capacitor type input, the input impedance of the 207 is
dependent on the clock frequency. At relatively slow
conversion rates, a general purpose type input buffer can be
used; at high conversion rates DATEL recommends either
the HA-5033 or Elantec 2003. See Figure 2 for typical
connections.
adjusts the gain of the ADC-207. Adjusting the voltage at –
REFERENCE adjusts the offset or zero of the ADC-207.
The midpoint pin is usually bypassed to ground through a
0.1µF capacitor, although it can be tied to a precision
voltage halfway between +REFERENCE and
–REFERENCE. This would improve integral linearity
beyond 7 bits.
bandwidths, the clock duty cycle can be adjusted so that the
low portion of the clock pulse is 12ns wide. The smaller
aperture allows the ADC-207 to closely resemble an ideal
sampler. See Figure 4.
degradation in offset and differential nonlinearity.
Performance may be improved by increasing the clock duty
cycle (decreasing the time spent in the sample mode).
Figure 2. Typical Connections for Using the ADC-207
5
47µF
47µF
HA-5033
+
+
+15
–15
12
10
11
10
+5V
20MHz
CLOCK
CAUTION
0.1µF
MIN.
–55
–65
0
1
4
5
6
7
9
2
3
8
®
24-pin ceramic LCC
18-pin ceramic DIP
CLOCK
DIGITAL GND
–REFERENCE
V
MID
+REFERENCE
ANALOG GND
CS1
CS2
TYP.
IN
4.7µF
+
0.01µF
MAX.
+125
+150
+70
+V
OF
B7
B6
B5
B4
B3
B2
DD
B1
18
+5V
17
16
15
14
13
12
11
10
B7
B6
B5
UNITS
B4
B3
B2
B1
OF
(LSB)
(MSB)
°C
°C
°C
®

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