ADC1005 National Semiconductor Corporation, ADC1005 Datasheet - Page 4
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ADC1005
Manufacturer Part Number
ADC1005
Description
ADC1005 - 10-Bit Microprocessor Compatible A/D Converter, Package: Cerdip, Pin Nb=20
Manufacturer
National Semiconductor Corporation
Datasheet
1.ADC1005.pdf
(12 pages)
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f
Clock Duty Cycle
t
t
Width
t
falling edge of RD to Output
Data Valid)
t
(Delay from Rising Edge of RD
to Hi-Z State)
t
Edge of WR or RD to Reset of
INTR
t
Time
C
Inputs
C
Outputs
CLK
C
W(WR)L
ACC
1H
WI
IRS
The following specifications apply for V
its apply from T
IN
OUT
, Conversion Time
AC Electrical Characteristics
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating
the device beyond its specified operating conditions.
Note 2: All voltages are measured with respect to ground.
Note 3: Linearity error is defined as the deviation of the analog value, expressed in LSBs, from the straight line which passes through the end points of the transfer
characteristic.
Note 4: For V
voltages one diode drop below ground or one diode drop greater than V
(5V) can cause this input diode to conduct, especially at elevated temperatures, and cause errors for analog inputs near full-scale. The spec allows 50 mV forward
bias of either diode. This means that as long as the analog V
an absolute 0 V
loading.
Note 5: Typicals are at 25˚C and represent most likely parametric norm.
Note 6: Tested and guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 7: Guaranteed, but not 100% production tested. These limits are not used to calculate outgoing quality levels.
Note 8: Human body model, 100 pF discharged through a 1.5 k
, t
, t
, Capacitance of Logic
, INTR to 1st Read Set-up
, Clock Frequency
, Access Time (Delay from
0H
RI
, Capacitance of Logic
, Delay from Falling
, TRI-STATE Control
, Minimum WR Pulse
Parameter
IN(−)
DC
V
to 5 V
MIN
IN(+)
to T
the digital output code will be 00 0000 0000. Two on-chip diodes are tied to each analog input which will forward conduct for analog input
DC
input voltage range will therefore require a minimum supply voltage of 4.950 V
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
MAX
; All other limits T
f
f
CS =0
CS =0
C
R
R
CLK
CLK
L
L
L
=100 pF, R
=10k, C
=2k, C
=1.8 MHz
=1.8 MHz
Conditions
CC
L
= 5V, V
=100 pF
L
=10 pF
A
L
IN
= 2k
= T
does not exceed the supply voltage by more than 50 mV, the output code will be correct. To achieve
REF
j
resistor.
= 25˚C.
= 5V,V
CC
supply. Be careful, during testing at low V
REF
(Note 5)
4
Typ
100
170
125
145
300
400
5
5
= 5V, t
r
= t
f
= 20 ns unless otherwise specified. Boldface lim-
(Note 6)
Tested
Limit
150
300
230
450
550
0.2
2.6
40
60
80
90
45
50
DC
over temperature variations, initial tolerance and
CC
levels (4.5V), as high level analog inputs
(Note 7)
Design
Limit
150
300
200
230
450
550
0.2
2.6
7.5
7.5
40
60
80
90
45
50
1/f
1/f
Units
Limit
MHz
MHz
pF
pF
µs
µs
ns
ns
ns
ns
ns
ns
%
%
CLK
CLK