MAX6701 Maxim, MAX6701 Datasheet - Page 8
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MAX6701
Manufacturer Part Number
MAX6701
Description
Low-Voltage / SOT23 P Supervisors with Power- Fail In/Out / Manual Reset / and Watchdog Timer
Manufacturer
Maxim
Datasheet
1.MAX6701.pdf
(12 pages)
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The MAX6701/MAX6702/MAX6703/MAX6705/MAX6706/
MAX6707s’ WDO latches low when one of the following
events occurs:
• The watchdog timer times out (1.6s, typ).
• V
• MR is pulled low.
• WDO only deasserts with a valid WDI transition.
TheMAX6701(A)/MAX6702(A)/MAX6703(A)/MAX6705(A)/
MAX6706(A)/MAX6707(A)s’ WDO asserts when either
V
WDO deasserts without a timeout delay when the
undervoltage situation has expired. WDO is latched low
when the watchdog timer elapses without seeing a WDI
transition. WDO deasserts with a valid WDI transition
OR by pulling MR low.
See Figures 4 and 5 for standard-version timing. See
Figures 6 and 7 for A-version timing.
The MAX6701–MAX6707 watchdog circuit monitors the
µP’s activity. If the µP does not toggle the WDI within 1.6s,
WDO goes low. When RESET is asserted, the watchdog
timer stays cleared and does not count. As soon as reset
is released, the timer starts counting. WDO deasserts
after a valid transition is detected at WDI. Pulses as short
as 50ns can be detected.
Typically, WDO is connected to the NMI input of a µP.
When V
Low-Voltage, SOT23 µP Supervisors with Power-
Fail In/Out, Manual Reset, and Watchdog Timer
Figure 5. MAX6701/MAX6702/MAX6703/MAX6705/MAX6706/
MAX6707 Watchdog
8
CC
CC
(RESET)
( ) ARE FOR MAX6702/MAX6706 ONLY.
_______________________________________________________________________________________
, RST_IN1, or RST_IN2 is below its reset threshold.
RESET
WDO
WDI
MR
, RST_IN1, or RST_IN2 is below its reset threshold.
CC
+5V
t
+5V
+5V
+5V
+5V
WDI
0V
0V
0V
0V
0V
Standard- vs. A-Version Comparison
, RST_IN1, or RST_IN2 drop below the reset
t
WD
RESET EXTERNALLY
TRIGGERED BY MR
Watchdog Timer
t
RP
t
WD
threshold, WDO goes low whether or not the watchdog
timer has timed out. Normally this would trigger an NMI,
but RESET goes low simultaneously, and thus overrides
the NMI.
The MAX6704 watchdog circuit does not have an inde-
pendent watchdog output (WDO). If the µP does not
toggle the watchdog input within 1.6s, the MAX6704
asserts a reset output pulse for the reset timeout period.
The manual reset input (MR) allows reset to be trig-
gered by a pushbutton switch. The switch is effectively
debounced by the reset pulse width. MR is CMOS logic
compatible, so it can be driven by an external logic
line. MR can be used to force a watchdog timeout to
generate a reset pulse in the MAX6701(A)/MAX6702(A)/
MAX6703(A)/MAX6705(A)/MAX6706(A)/MAX6707(A) by
connecting WDO to MR.
The uncommitted power-fail comparator can be used
for various purposes because its noninverting input and
output are externally available. The inverting input is
internally connected to a 0.62V reference. To build an
early warning circuit for power failure, connect the PFI
pin to a voltage-divider (see Typical Operating Circuit).
Choose the voltage-divider ratio so that the voltage at
PFI falls below 0.62V just before the regulator drops
out. Use PFO to interrupt the µP so it can prepare for an
orderly power-down. The low-input current at this pin
allows for large resistor values in the divider.
Figure 6. MAX6701(A)/MAX6702(A)/MAX6703(A)/MAX6705(A)/
MAX6706(A)/MAX6707(A) RESET, MR, and WDO Timing with
WDI Three-Stated
RESET
WDO
MR
V
+5V
+5V
+5V
0V
0V
CC
0V
V
TH
V
TH
Power-Fail Comparator
t
RP
Manual Reset
t
MD
t
MR
t
RP