LPC3220 Philips Semiconductors (Acquired by NXP), LPC3220 Datasheet - Page 23

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LPC3220

Manufacturer Part Number
LPC3220
Description
Manufacturer
Philips Semiconductors (Acquired by NXP)
Datasheet

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LPC3220_30_40_50_1
Preliminary data sheet
7.2.1 APB
7.2.2 FAB
7.3 Physical memory map
Many peripheral functions are accessed by on-chip APBs that are attached to the higher
speed AHB. The APB performs reads and writes to peripheral registers in three peripheral
clocks.
Some peripherals are placed on a special bus called FAB that allows faster CPU access
to those peripheral functions. A write access to FAB peripherals takes a single AHB clock
and a read access to FAB peripherals takes two AHB clocks.
The physical memory map incorporates several distinct regions, as shown in
When an application is running, the CPU interrupt vectors are re-mapped to allow them to
reside in on-chip SRAM (IRAM).
Rev. 01 — 6 February 2009
LPC3220/30/40/50
16/32-bit ARM microcontrollers
© NXP B.V. 2009. All rights reserved.
Figure
23 of 73
3.

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