LPC2880 Philips Semiconductors (Acquired by NXP), LPC2880 Datasheet - Page 17

• Manufacturer Part Number: LPC2880
• Manufacturer: Philips Semiconductors (Acquired by NXP)

Philips Semiconductors
LPC2880_LPC2888_1
Preliminary data sheet
6.6.1 Features
6.7.1 Features
6.6 GPIO
6.7 Interrupt controller
6.8 Event router
Many device pins that are not connected to a specific peripheral function can be used as
are GPIOs. These pins can be controlled by the MODE registers. Pins may be
dynamically configured as inputs or outputs. Separate registers allow setting or clearing
any number of outputs simultaneously. The current state of the port pins may be read
back via the PIN registers.
The interrupt controller accepts all of the interrupt request inputs and categorizes them as
FIQ or IRQ. The programmable assignment scheme means that priorities of interrupts
from the various peripherals can be dynamically assigned and adjusted.
FIQ has the highest priority. If more than one request is assigned to FIQ, the interrupt
controller combines the requests to produce the FIQ signal to the ARM processor.
The interrupt controller combines the requests from all the vectored IRQs to produce the
IRQ signal to the ARM processor. The IRQ service routine can start by reading a register
from the interrupt controller and jumping there.
105 external and internal LPC2880/LPC2888 signals are connected to the Event Router
block. Most of them are device pins, plus a selection of internal signals from other
LPC2880/LPC2888 modules. GPIO input pins, functional input pins, and even functional
outputs can be monitored by the Event Router.
Each signal can act as an interrupt source, or a clock enable or reset source for
LPC2880/LPC2888 modules, with individual options for high- or low-level sensitivity or
rising- or falling-edge sensitivity. The outputs of the polarity and sensitivity logic can be
read from Raw Status Registers 0 to 3.
Each active state is next masked/enabled by a “global” mask bit for that signal. The results
can be read from Pending Registers 0 to 3.
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81 pins have dual use as a specific function I/O or as a GPIO.
Each dual use pin can be programmed for functional I/O, drive high, drive low, or
hi-Z/input.
Four pins are dedicated as GPIO, programmable for drive high, drive low, or
hi-Z/input.
Maps all LPC2880/LPC2888 interrupt sources to processor FIQ and IRQ
Level sensitive sources
Programmable priority among sources
Nested interrupt capability
Software interrupt capability for each source
16/32-bit ARM microcontrollers with external memory interface
Rev. 01 — 22 June 2006
LPC2880; LPC2888
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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