LPC2212 Philips Semiconductors (Acquired by NXP), LPC2212 Datasheet - Page 21

• Manufacturer Part Number: LPC2212
• Description: 16/32-bit Arm Microcontrollers; 128/256 KB Isp/iap Flash With 10-bit ADC And External Memory Interfacebased on a 16/32 Bit ARM7TDMI-STM Cpu With Real-time Emulation And Embedded Trace Support, Together With 128/256 Kilobytes (kB) of Embedded High Spe
• Manufacturer: Philips Semiconductors (Acquired by NXP)

Philips Semiconductors
9397 750 12747
Preliminary data
6.15.1 Features
6.16.1 Features
6.15 SPI serial I/O controller
6.16 General purpose timers
The LPC2212/LPC2214 each contain two SPIs. The SPI is a full duplex serial
interface, designed to be able to handle multiple masters and slaves connected to a
given bus. Only a single master and a single slave can communicate on the interface
during a given data transfer. During a data transfer the master always sends a byte of
data to the slave, and the slave always sends a byte of data to the master.
The Timer is designed to count cycles of the peripheral clock (PCLK) and optionally
generate interrupts or perform other actions at specified timer values, based on four
match registers. It also includes four capture inputs to trap the timer value when an
input signal transitions, optionally generating an interrupt. Multiple pins can be
selected to perform a single capture or match function, providing an application with
‘or’ and ‘and’, as well as ‘broadcast’ functions among them.
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Multi-master bus (no central master).
Arbitration between simultaneously transmitting masters without corruption of
serial data on the bus.
Serial clock synchronization allows devices with different bit rates to communicate
via one serial bus.
Serial clock synchronization can be used as a handshake mechanism to suspend
and resume serial transfer.
The I
Compliant with Serial Peripheral Interface (SPI) specification.
Synchronous, Serial, Full Duplex, Communication.
Combined SPI master and slave.
Maximum data bit rate of one eighth of the input clock rate.
A 32-bit Timer/Counter with a programmable 32-bit Prescaler.
Four 32-bit capture channels per timer that can take a snapshot of the timer value
when an input signal transitions. A capture event may also optionally generate an
interrupt.
Four 32-bit match registers that allow:
Four external outputs per timer corresponding to match registers, with the following
capabilities:
– Continuous operation with optional interrupt generation on match.
– Stop timer on match with optional interrupt generation.
– Reset timer on match with optional interrupt generation.
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C bus may be used for test and diagnostic purposes.
Rev. 01 — 02 February 2004
16/32-bit ARM microcontrollers with external memory interface
LPC2212/LPC2214
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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