AT9919 Supertex, Inc., AT9919 Datasheet - Page 4

• Manufacturer Part Number: AT9919
• Manufacturer: Supertex, Inc.

Block Diagram
Application Information
General Description
The AT9919 is a step-down, constant current, high-bright-
ness LED (HB LED) driver. The device operates from a 4.5
to 40V input voltage range and provides the gate drive out-
put to an external N-channel MOSFET. A high-side current
sense resistor sets the output current and a dedicated PWM
dimming input (DIM) allows for a wide range of diming duty
ratios. The PWM dimming could also be achieved by apply-
ing a DC voltage between 0 and 2.0V to the analog dimming
input (ADIM). In this case, the dimming frequency can be
programmed using a single capacitor at the RAMP pin. The
high-side current setting and sensing scheme minimizes the
number of external components while delivering LED cur-
rent with a ±8% accuracy, using a 1% sense resistor.
Undervoltage Lockout (UVLO)
The AT9919 includes a 3.7V under-voltage lockout (UVLO)
with 500mV hysteresis. When V
goes low, turning off the external n-channel MOSFET. GATE
goes high once V
5.0V Regulator
VDD is the output of a 5.0V regulator capable of sourcing
8.0mA. Bypass VDD to GND with a 1.0μF capacitor.
Supertex inc.
IN
is 4.5V or higher.
RAMP
ADIM
VIN
CS
IN
BANDGAP
falls below 3.7V, GATE
1235 Bordeaux Drive, Sunnyvale, CA 94089
PWM RAMP
REF
0.1~1.9V
COMPARATOR
COMPARATOR
REGULATOR
CURRENT
+
SENSE
+
-
-
UVLO
+
-
4
DIM Input
The AT9919 allows dimming with a PWM signal at the DIM
input. A logic level below 0.7V at DIM forces the GATE
low, turning off the LED current. To turn the LED current on,
the logic level at DIM must be at least 2.2V.
ADIM and RAMP Inputs
The PWM dimming scheme can be also implemented by ap-
plying an analog control signal to ADIM pin. If an analog con-
trol signal of 0~2.0V is applied to ADIM, the device compares
this analog input to a voltage ramp to pulse-width-modulate
the LED current. Connecting an external capacitor to RAMP
programs the PWM dimming ramp frequency.
DIM and ADIM inputs can be used simultaneously. In such
case, f
the dimming signal at DIM. The smaller dimming duty cycle
of ADIM and DIM will determine the GATE signal.
When the analog control of PWM dimming feature is not
used, RAMP must be wired to GND, and ADIM should be
connected to VDD.
PWM(MAX)
f
PWM
=
Tel: [phone]
must be selected lower than the frequency of
C
AT9919
RAMP
DRIVER
GATE
• 120kΩ
1
www.supertex.com
VDD
DIM
GND
GATE
AT9919
OUTPUT