AT94K05AL ATMEL Corporation, AT94K05AL Datasheet - Page 142
AT94K05AL
Manufacturer Part Number
AT94K05AL
Description
Fpslic Devices Combine 5K Gates of Atmel's Patented AT40K Fpga Architecture, a 20 Mips Avr 8-bit Risc Microprocessor Core, Numerous Fixed Microcontroller Peripheries And up to 36K Bytes of Program And Data SRAM.
Manufacturer
ATMEL Corporation
Datasheet
1.AT94K05AL.pdf
(192 pages)
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Table 42. Status Codes for Slave Receiver Mode
142
(TWSR)
Status
Code
$60
$68
$70
$78
$80
$88
AT94K Series FPSLIC
Status of the 2-wire
Serial Bus and 2-wire
Serial Hardware
Own SLA+W has been
received;
ACK has been returned
Arbitration lost in
SLA+R/W as Master;
own SLA+W has been
received;
ACK has been returned
General call address
has been received;
ACK has been returned
Arbitration lost in
SLA+R/W as Master;
General call address
has been received;
ACK has been returned
Previously addressed
with own SLA+W; data
has been received;
ACK has been returned
Previously addressed
with own SLA+W; data
has been received;
NOT ACK has been
returned
To/From TWDR
No TWDR action or
No TWDR action
No TWDR action or
No TWDR action
No TWDR action or
No TWDR action
No TWDR action or
No TWDR action
No TWDR action or
No TWDR action
Read data byte or
Read data byte or
Read data byte or
Read data byte
Application Software Response
STA
X
X
X
X
X
X
X
X
X
X
0
0
1
1
STO
0
0
0
0
0
0
0
0
0
0
0
0
0
0
To TWCR
TWINT
1
1
1
1
1
1
1
1
1
1
1
1
1
1
TWEA
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Next Action Taken by 2-wire
Serial Hardware
Data byte will be received and NOT ACK
will be returned
Data byte will be received and ACK will be
returned
Data byte will be received and NOT ACK
will be returned
Data byte will be received and ACK will be
returned
Data byte will be received and NOT ACK
will be returned
Data byte will be received and ACK will be
returned
Data byte will be received and NOT ACK
will be returned
Data byte will be received and ACK will be
returned
Data byte will be received and NOT ACK
will be returned
Data byte will be received and ACK will be
returned
Switched to the not addressed Slave mode;
no recognition of own SLA or GCA
Switched to the not addressed Slave mode;
own SLA will be recognized; GCA will be
recognized if GC = “1”
Switched to the not addressed Slave mode;
no recognition of own SLA or GCA; a
START condition will be transmitted when
the bus becomes free
Switched to the not addressed Slave mode;
own SLA will be recognized; GCA will be
recognized if GC = “1”; a START condition
will be transmitted when the bus becomes
free
Rev. 1138F–FPSLI–06/02
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