AT91FR40161 ATMEL Corporation, AT91FR40161 Datasheet - Page 30

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AT91FR40161

Manufacturer Part Number
AT91FR40161
Description
The AT91FR40161 Features 136 K Bytes of On-chip SRAM, 2M Bytes of Flash, an External Bus Interface, a 3-channel Timer/Counter, 2 ...
Manufacturer
ATMEL Corporation
Datasheet

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Data Float Wait State
30
AT91X40 Series
Figure 18. One Wait State Access
Notes:
Some memory devices are slow to release the external bus. For such devices it is nec-
essary to add wait states (data float waits) after a read access before starting a write
access or a read access to a different external memory.
The Data Float Output Time (t
TDF field of the EBI_CSR register for the corresponding chip select. The value (0 - 7
clock cycles) indicates the number of data float waits to be inserted and represents the
time allowed for the data output to go high impedance after the memory is disabled.
Data float wait states do not delay internal memory accesses. Hence, a single access to
an external memory with long t
internal memory.
The EBI keeps track of the programmed external data float time during internal
accesses, to ensure that the external memory system is not accessed while it is still
busy.
Internal memory accesses and consecutive accesses to the same external memory do
not have added Data Float wait states.
1. Early Read Protocol
2. Standard Read Protocol
ADDR
NWE
MCK
NRD
NCS
(1)
DF
) for each external memory device is programmed in the
DF
1 Wait State Access
will not slow down the execution of a program from
(2)
1354D–ATARM–08/02

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