CORE429-AN Actel Corporation, CORE429-AN Datasheet

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CORE429-AN

Manufacturer Part Number
CORE429-AN
Description
Arinc 429 Bus Interface
Manufacturer
Actel Corporation
Datasheet
ARINC 429 Bus Interface
Product Summary
Intended Use
Key Features
Supported Families
September 2006
© 2006 Actel Corporation
• ARINC 429 Transmitter (Tx)
• ARINC 429 Receiver (Rx)
• Supports ARINC Specification 429-16
• Configurable up to 16 Rx and 16 Tx Channels
• Programmable FIFO Depth
• Programmable Interrupt Generation
• Configurable Label Memory Size
• Internal, Wrap-Around Testing
• Software Compatible with Legacy Devices
• Selectable Clock Speed
• Selectable Data Rate on Each Channel
• CPU Interface
• Memory
• ARINC 429 Bus Interface
• Available as Integrated Tx and Rx
• Fusion
• ProASIC
• ProASIC
• Axcelerator
• RTAX-S
– Up to 512 Words
– Rx and Tx Channels independently
– Up to 64 Words
– Rx and Tx Channels independently
– Up to 256 Words
– 1, 10, 16, or 20 MHz
– 12.5 100 kbps
– Optional 50 kbps
– Provides Direct CPU Access to Memory
– Simple Interface to Core8051
– EDAC Support with RTAX-S Family
– Supports Standard Line Drivers and Receivers
®
PLUS®
3/E
®
v 5 .0
Core Deliverables
Development System
Synthesis and Simulation Support
Verification and Compliance
• Evaluation Version
• Netlist Version
• RTL version
• Verification Testbench – Verilog
• User Testbenches
• Complete ARINC 429 Rx/Tx
• Implementation
• Includes Line Driver and Receiver Components
• Directly Supported within the Actel Libero IDE
• Synthesis:
• Simulation
• Actel-Developed Simulation Testbench
• Core
– Compiled RTL Simulation Model, Compliant
– Structural VHDL and Verilog Netlists
– VHDL or Verilog Core Source Code
– Synthesis Scripts
– Libero IDE Compatible
– VHDL and Verilog
– Implemented in an APA600 Device
– Controlled Via an External Terminal Using
– Synplicity®
– Exemplar
– Synopsys
– Vital-Compliant VHDL Simulators
– OVI-Compliant Verilog Simulators
Development System
with the Actel Libero
Environment (IDE)
Core8051 and RS232 Links
Implemented
®
TM
on
®
the
Integrated Design
ARINC
429
1

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