MAX534 Maxim, MAX534 Datasheet - Page 6

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MAX534

Manufacturer Part Number
MAX534
Description
+5V / Low-Power / 8-Bit Quad DAC with Rail-to-Rail Output Buffers
Manufacturer
Maxim
Datasheet

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+5V, Low-Power, 8-Bit Quad DAC
with Rail-to-Rail Output Buffers
6
______________________________________________________________Pin Description
PIN
10
11
12
13
14
15
16
_______________________________________________________________________________________
1
2
3
4
5
6
7
8
9
NAME
DGND
AGND
OUTB
OUTA
DOUT
OUTD
OUTC
LDAC
SCLK
UPO
PDE
CLR
REF
V
DIN
CS
DD
DAC B Voltage Output
DAC A Voltage Output
Reference-Voltage Input
Software-Programmable Logic Output
Power-Down Enable. Must be high to allow software shutdown mode.
Load DAC Input (active low). Driving this asynchronous input low (level sensitive) transfers the contents
of each input latch to its respective DAC latch.
Clear DAC Input (active low). Driving CLR low asynchronously clears the input and DAC registers, and
sets all DAC outputs to zero.
Serial Data Output. Sinks and sources current. Data at DOUT can be clocked out on the rising or falling
edge of SCLK (Table 1).
Chip-Select Input (active low). Data is shifted in and out when CS is low. Programming commands are
executed when CS returns high.
Serial Clock Input. Data is clocked in on the rising edge and clocked out on the falling (default) or rising
edge (A0 = A1 = 1, see Table 1).
Serial Data Input. Data is clocked in on the rising edge of SCLK.
Digital Ground
Power Supply, +4.5V to +5.5V
Analog Ground
DAC D Voltage Output
DAC C Voltage Output
FUNCTION

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