MAX4895E Maxim Integrated Products, MAX4895E Datasheet - Page 4

• Manufacturer Part Number: MAX4895E
• Description: VGA Port Protector
• Manufacturer: Maxim Integrated Products

www.DataSheet4U.com
VGA Port Protector
The MAX4895E provides the level shifting necessary to
drive two standard VGA ports from a graphics controller
as low as +2.2V. Internal buffers drive the HSYNC and
VSYNC signals to VGA standard TTL levels. The DDC
switch provides level shifting by clamping signals to a
diode drop less than V
Circuit ). Connect V
Bypass V
capacitor as close as possible to the device.
High-speed switches such as the MAX4895E require
proper PCB layout for optimum performance. Ensure
that impedance-controlled PCB traces for high-speed
signals are matched in length and are as short as pos-
sible. Connect the exposed pad to a solid ground
plane.
4
_______________________________________________________________________________________
PIN
10
11
12
13
14
15
16
—
1
2
3
4
5
6
7
8
9
CC
and V
Applications Information
NAME
SDA0
SDA1
SCL0
SCL1
GND
N.C.
V
H0
H1
EN
V0
V1
EP
V
G
R
B
CC
L
L
to +3.3V for normal operation.
L
Power-Supply Decoupling
to ground with a 1µF ceramic
L
High-ESD Protection Diodes for RGB Signals
High-ESD Protection Diodes for RGB Signals
High-ESD Protection Diodes for RGB Signals
Ground
Supply Voltage, +2.0V to V
No Connection. Leave unconnected.
SDA I/O. SDA0 referenced to V
SDA I/O. SDA1 referenced to V
SCL I/O. SCL0 referenced to V
SCL I/O. SCL1 referenced to V
Horizontal Sync Input
Horizontal Sync Output
Vertical Sync Input
Vertical Sync Output
Power-Supply Voltage, +4.5V to +5.5V. Bypass V
Enable for H1 and V1 Outputs
Exposed Pad. Connect EP to GND or leave unconnected. For enhanced thermal dissipation,
connect EP to a copper area as large as possible. Do not use EP as a sole ground connection.
(see the Typical Operating
PCB Layout
CC
. Bypass V
L
CC
L
CC
.
.
.
.
The MAX4895E integrates level-translating buffers and
features R, G, B port protection for VGA signals.
Horizontal and vertical synchronization (H0/V0) inputs
feature level-shifting buffers to support low-voltage
CMOS or standard TTL-compatible graphics con-
trollers. The device meets ±10µA VESA drive require-
ments. The MAX4895E also features I
using two nMOS devices. All outputs maintain ±15kV
Human Body Model (HBM) and ±8kV Contact
Discharge per IEC 61000-4-2 on seven terminals
(SDA1, SCL1, H1, V1, R, G, B). The R, G, B pads pro-
tect the digital-to-analog converter (DAC) and are sim-
ply placed in parallel with the R, G, B outputs for the
DAC and VGA socket.
L
to GND with a 1μF ceramic capacitor.
FUNCTION
CC
to GND with a 1μF ceramic capacitor.
Detailed Description
Pin Description
2
C level shifting