MAX3804 Maxim, MAX3804 Datasheet - Page 6

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MAX3804

Manufacturer Part Number
MAX3804
Description
12.5Gbps Settable Receive Equalizer
Manufacturer
Maxim
Datasheet

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The MAX3804 equalizer is intended for use at the
receive end of an FR-4 PC board transmission line,
typically up to 30in of differential 6-mil stripline or
microstrip. It is specifically designed to mitigate
intersymbol interference caused by the frequency-
dependent path loss of FR-4 transmission lines. It can
also be used with a variety of other transmission-line
materials and geometries, including coaxial cable,
or PC board paths that include well-engineered
connectors. Table 1 shows the relationship between
nominal 6-mil FR-4 transmission line length and
equalization setting.
The CML input and output supplies (V
be connected to +1.8V to +3.3V. V
not be connected to the same supply voltage; however,
the core supply (V
The MAX3804 is packaged in a 3mm x 3mm plastic-
encapsulated 16-lead thin QFN package. The package
has an exposed pad that provides thermal and
electrical connectivity to the IC and must be soldered
to a high-frequency ground. Use good layout tech-
niques for the SDI± and SDO± PC board transmission
lines, and configure the trace geometry near the IC
12.5Gbps Settable Receive Equalizer
Figure 1. Functional Diagram
6
_______________________________________________________________________________________
SDI+
SDI-
EQ1
EQ2
EQ3
Package and Layout Considerations
V
50Ω
CC1
Applications Information
Equalizer Boost Level Control
CC
Supply Voltage Connections
50Ω
CML
) must be connected to +3.3V.
BOOST-
RESPONSE
AMPLIFIER
FLAT-
RESPONSE
AMPLIFIER
TO-ANALOG
CONVERTER
DIGITAL-
CC1
CC1
and V
, V
CC2
CC2
ATTENUATOR
ATTENUATOR
) can
need
VARIABLE
VARIABLE
package to minimize impedance discontinuities.
Power-supply decoupling capacitors should be as
close as possible to the IC.
Figure 2. Simplified Output Structure
MAX3804
50Ω
LIMITING
AMP
MAX3804
V
CC2
50Ω
DIODES
ESD
CML
50Ω
V
CC
V
50Ω
CC2
SDO+
SDO-
SDO+
SDO-

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